DescriptionIn this talk we will discuss some of the practical aspects of lattice-based and homomorphic encryption, with particular reference to associated hardware designs. Current instantiations of FHE are known to be too slow for practical use. However, the combination of both algorithmic and implementation optimisations can increase performance greatly; for example we have shown research speed improvements for FHE encryption of up to approximately 130. Lattice-based cryptography shows promise as a quantum- safe alternative to existing public-key cryptosystems. However, the performance of such schemes suffer with associated large public key sizes, which is a challenge for real world systems. Research carried out into the hardware design of encryption using standard lattices, as part of the H2020 SAFEcrypto project, will be discussed to show the potential performance improvement achieved via the proposal of optimised hardware designs; our hardware design of a standard lattice-based cryptographic scheme carries out over 1200 encryptions per second and 4300 decryptions per second, targeting the lightweight Spartan-6 FPGA platform.
|Period||15 Jan 2018|
|Event title||London Lattice Meeting|
|Location||London, United Kingdom|
|Degree of Recognition||National|