Ayesha Khalid

Personal profile

Research Interests

I strive to carry out world class research in the area of hardware security. My key research interests include area-efficient implementations for cryptography, High-level synthesis, studying cryptanalytic vulnerabilities and countermeasures and Post Quantum cryptography.

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14 Similar Profiles

Cryptography Engineering & Materials Science

Hardware Engineering & Materials Science

Throughput Engineering & Materials Science

Stream Ciphers Mathematics

Field programmable gate arrays (FPGA) Engineering & Materials Science

Quantum cryptography Engineering & Materials Science

Particle accelerators Engineering & Materials Science

Rapid prototyping Engineering & Materials Science

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Projects 2019 2019

1 Active

R1081ECI: Phase 2 Quantum Technologies Hub proposal

O'Neill, M., Khalid, A. & Rafferty, C.

10/07/2019 → …

Project: Research

Research Output 2011 2019

19 Conference contribution
7 Article
3 Paper
2 Poster
1 More
- 1 Chapter

Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler

Brannigan, S., O'Neill, M., Khalid, A. & Rafferty, C., 11 Jan 2019, 8th International Conference on Security, Privacy, and Applied Cryptography Engineering: Proceedings. Springer-Verlag, p. 65-84 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Open Access

File

Data storage equipment

Sampling

Digital arithmetic

Quantum cryptography

Gaussian distribution

Cloud Computing in the Quantum Era

Kaiiali, M., Sezer, S. & Khalid, A., 07 Apr 2019, (Accepted) The 5th IEEE Workshop on Security and Privacy in the Cloud (SPC 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Cloud computing

Quantum computers

Industry

Cryptography

Elasticity

Domain Specific High-Level Synthesis for Cryptographic Workloads

Khalid, A., Chattopadhyay, A. & Paul, G., 01 Apr 2019, Domain Specific High-Level Synthesis for Cryptographic Workloads. Springer-Verlag

Research output: Chapter in Book/Report/Conference proceeding › Chapter

Cryptography

VLSI circuits

High level synthesis

Scalability

Optimal design

Error Samplers for Lattice-Based Cryptography - Challenges, Vulnerabilities and Solutions

Khalid, A., Rafferty, C., Howe, J., Brannigan, S., Liu, W. & O'Neill, M., 10 Jan 2019, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS): 26/10/2018 → 30/10/2018 Chengdu, China. IEEE , 4 p.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

File

Cryptography

Quantum cryptography

Surveying

Standardization

Hardness

1 Citation (Scopus)

Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography

Howe, J., Khalid, A., Martinoli, M., Regazonni, F. & Oswald, E., 01 May 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE , 5 p.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Open Access

File

Cryptography

Statistical tests

Encapsulation

Standardization

Field programmable gate arrays (FPGA)