• Room 03.003 - Computer Science Building

    United Kingdom

Accepting PhD Students

PhD projects

Field Programmable Gate Array High Level Synthesis Biological Signal Processing (EEG, ECG, EMG etc.) Quantum Computing Neuromorphic Computing Custom Computer Architecture

20032020

Research output per year

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Research Output

2003

Design Technologies for DSP Algorithm Implementation on Heterogeneous Architectures

McAllister, J., Yi, Y., Woods, R., Walke, R., Reilly, D. & Colgan, K., Aug 2003, p. 585-596. 12 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)
2004

Embedded Context Aware Hardware Component Generation for Dataflow System Exploration

McAllister, J., Woods, R. & Walke, R., Jul 2004, p. 254-263. 10 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Synthesis and High Level Optimisation of Multidimensional Dataflow Actor Network on FPGA

McAllister, J., Woods, R., Walke, R. & Reilly, D., Sep 2004, p. 164-169. 6 p.

Research output: Contribution to conferencePaper

9 Citations (Scopus)
2005

FPGA Core Network Implementation and Optimization: A Case Study

Fischaber, S., Hasson, R., McAllister, J. & Woods, R., Dec 2005, p. 319-320. 2 p.

Research output: Contribution to conferencePaper

Rapid Generation of Hardware Functionality in Heterogeneous Platforms

Reilly, D., Woods, R., McAllister, J. & Walke, R., Mar 2005, p. V65-V68. 4 p.

Research output: Contribution to conferencePaper

Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms

McAllister, J., Woods, R., Reilly, D., Fischaber, S. & Hasson, R., Jul 2005, Embedded Computer Systems: Architectures, Modelling and Simulation. Hamalainen, T., Pimentel, A., Takala, J. & Vassiliadis, S. (eds.). Springer, p. 414-423 10 p. (Lecture Notes In Computer Science; vol. 3553).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2006

Muir Hardware Synthesis for Multimedia Applications

Fischaber, S., McAllister, J., Woods, R. & Malins, E., Nov 2006, p. 1-13. 13 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Multidimensional DSP Core Synthesis for FPGA

McAllister, J., Woods, R., Walke, R. & Reilly, D., Jun 2006, In : Journal of VLSI signal processing systems for signal, image and video technology. 43(2-3), 2-3, p. 207-221 15 p.

Research output: Contribution to journalArticle

12 Citations (Scopus)
2007

Design Methodology for Real-Time FPGA-Based Sound Synthesis

Motuk, E., Woods, R., Bilbao, S. & McAllister, J., Dec 2007, In : IEEE Transactions on Signal Processing. 55(12), 12, p. 5833-5845 13 p.

Research output: Contribution to journalArticle

11 Citations (Scopus)

Rapid Implementation and Optimisation of DSP Systems on FPGA-Centric Hetrogeneous Platforms

McAllister, J., Woods, R., Fischaber, S. & Malins, E., Aug 2007, In : Journal of Systems Architecture. 53 (8), 8, p. 511-523 13 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)

SoC Memory Hierarchy Derivation from Dataflow Graphs

Fischaber, S., Woods, R. & McAllister, J., Oct 2007, p. 469-474. 6 p.

Research output: Contribution to conferencePaper

10 Citations (Scopus)
2008

Algorithmic Factorisation for Low Power FPGA Implementations Through Increased Data Locality

McKeown, M., Woods, R. & McAllister, J., Apr 2008, p. 271-274. 4 p.

Research output: Contribution to conferencePaper

5 Citations (Scopus)

Memory-Centric Hardware Synthesis from Dataflow Models

Fischaber, S., McAllister, J. & Woods, R. (ed.), Jul 2008, Embedded Computer Systems: Architectures, Modeling, and Simulation. p. 197-206 10 p. (Lecture Notes in Computer Science; vol. 5114).

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Citation (Scopus)

Modified Givens Rotations and Their Application to Matrix Inversion

Ma, L., Dickson, K., McAllister, J. & McCanny, J., Mar 2008, p. 1437-1440. 4 p.

Research output: Contribution to conferencePaper

7 Citations (Scopus)

Power Efficient DSP Datapath Configuration Methodology for FPGA

McKeown, M., Woods, R. & McAllister, J., Sep 2008, 2008 International Conference on Field Programmable Logic and Applications. Proceedings. p. 515-518 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Power Efficient Dynamic-Range Utilisation for DSP On FPGA

McKeown, M., Woods, R. & McAllister, J., Oct 2008, 2008 IEEE Workshop on Signal Processing Systems. p. 233-238 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2009

An Ultra-fine Processor for FPGA DSP Chip Multiprocessors

Milford, M. & McAllister, J., Nov 2009, p. 226-230. 5 p.

Research output: Contribution to conferencePaper

6 Citations (Scopus)

Evolutionary Requirements for Next-Generation Dataflow-Based FPGA System Design

McAllister, J., Aug 2009, p. 2688-2692.

Research output: Contribution to conferencePaper

FPGA-Based Implementation of Signal Processing Systems

Woods, R., McAllister, J., Lightbody, G. & Yi, Y., 20 Feb 2009, John Wiley and Sons. 364 p.

Research output: Book/ReportBook

113 Citations (Scopus)

SoC memory hierarchy derivation from dataflow graphs

Fischaber, S., Woods, R. & McAllister, J., Sep 2009, In : Journal of Signal Processing Systems. 60, 3, p. 345-361 17 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)
3 Downloads (Pure)
2010

FPGA based Soft-core SIMD Processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder Case Study

Chu, X., McAllister, J. & Woods, R., Dec 2010, p. 497-484. 8 p.

Research output: Contribution to conferencePaper

13 Citations (Scopus)

Improvements in or relating to Pattern Recognition

Aubert, L-M., McCourt, P., Wojcieszak, L., Woods, R., Fischaber, S., Veitch, R. & McAllister, J., Dec 2010, Patent No. 1020771.0

Research output: Patent

Regular-Choice Petri Nets for MIMO Detectors

Zheng, C., McAllister, J. & Woods, R., Oct 2010, p. 180-185. 6 p.

Research output: Contribution to conferencePaper

2011

A Kernel Interleaved Scheduling Method for Streaming Applications on Soft-core Vector Processors

Zheng, C., McAllister, J. & Wu, Y., Jul 2011, p. 278 -285. 8 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

A Low Complexity Real-time MIMO-Preprocessing For Fixed Complexity Sphere Decoder

Chu, X., McAllister, J. & Woods, R., Nov 2011, p. 102-106. 5 p.

Research output: Contribution to conferencePaper

A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection

Chu, X., McAllister, J. & Woods, R., Mar 2011, p. 129-140. 12 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Preface

Koch, A., Krishnamurthy, R., McAllister, J., Woods, R. & El-Ghazawi, T., 01 Jan 2011, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6578 LNCS, p. V-VI

Research output: Contribution to journalEditorial

QR decomposition-based matrix inversion for high performance embedded MIMO receivers

Ma, L., Dickson, K., McAllister, J. & McCanny, J., Apr 2011, In : IEEE Transactions on Signal Processing. 59 , 4, p. 1858-1867 10 p., 5685579.

Research output: Contribution to journalArticle

66 Citations (Scopus)
44 Downloads (Pure)

Real-valued fixed-complexity sphere decoder for high dimensional QAM-MIMO systems

Zheng, C., Chu, X., McAllister, J. & Woods, R., Sep 2011, In : IEEE Transactions on Signal Processing. 59, 9, p. 4493-4499 7 p., 5872079.

Research output: Contribution to journalArticle

36 Citations (Scopus)
1 Downloads (Pure)

Reconfigurable Computing: Architectures, Tools and Applications

Koch, A., Krishnamurthy, R., McAllister, J., Woods, R. & El-Ghazawi, T., Mar 2011, Springer. 398 p.

Research output: Book/ReportBook

Tree-Based Adaptive Spatial Detection for Adaptive Modulated MIMO Systems

Zheng, C., Wu, Y., McAllister, J. & Woods, R., Nov 2011, p. 107-113. 5 p.

Research output: Contribution to conferencePaper

2012

Automatic FPGA Synthesis of Memory Intensive C-based Kernels

Milford, M. & McAllister, J., Jul 2012, p. 136-143. 8 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Memory-centric VDF Graph Transformations for Practical FPGA Implementation

Milford, M. & McAllister, J., Oct 2012, p. 12-18. 8 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Software-defined sphere decoding for FPGA-based MIMO detection

Chu, X. & McAllister, J., Nov 2012, In : IEEE Transactions on Signal Processing. 60, 11, p. 6017-6026 10 p., 6255800.

Research output: Contribution to journalArticle

19 Citations (Scopus)
9 Downloads (Pure)

Valved Dataflow For FPGA Memory Hierarchy Synthesis

Milford, M. & McAllister, J., Mar 2012, p. 1645-1648. 4 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)
2013

FPGA-Based DSP

McAllister, J., 01 Jan 2013, Handbook of Signal Processing Systems: Second Edition. Springer New York, p. 707-739 33 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

4 Citations (Scopus)

High Performance Real-time Pre-Processing for Fixed-Complexity Sphere Decoder

Wu, Y., McAllister, J. & Wang, P., Dec 2013, p. 1250 - 1253. 4 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Soft-core Stream Processing on FPGA: An FFT Case Study

Wang, P., McAllister, J. & Wu, Y., May 2013, p. 2756 - 2760. 5 p.

Research output: Contribution to conferencePaper

10 Citations (Scopus)

Soft-core Stream Processor for Sliding Window Applications

Wang, P. & McAllister, J., Oct 2013, p. 213 - 218. 6 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Software defined FFT architecture for IEEE 802.11ac

Wang, P. & McAllister, J., Dec 2013, p. 1246-1249. 4 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE

Moore, C., Hanley, N., McAllister, J., O'Neill, M., O'Sullivan, E. & Cao, X., Apr 2013, Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers. Springer, p. 226-237 12 p. (Lecture Notes in Computer Science; vol. 7862).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
File
20 Citations (Scopus)
636 Downloads (Pure)
2014

FPGA-based Tabu Search for Detection in Large-Scale MIMO Systems

Wu, Y. & McAllister, J., Oct 2014, Proceedings of 2014 IEEE Workshop on Signal Processing Systems (SiPS). Institute of Electrical and Electronics Engineers (IEEE), p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
File
5 Citations (Scopus)
396 Downloads (Pure)
2015

Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation

McAllister, J., Guevorkian, D., Jeschke, H. & Sima, M., 2015, In : International Journal of Parallel Programming. 43, p. 1-2 2 p.

Research output: Contribution to journalArticle

2016

Constructive Synthesis of Memory-Intensive Accelerators for FPGA From Nested Loop Kernels

Milford, M. & McAllister, J., 15 Aug 2016, In : IEEE Transactions on Signal Processing. 64, 14, p. 4152-4165 14 p.

Research output: Contribution to journalArticle

Open Access
File
3 Citations (Scopus)
285 Downloads (Pure)

Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies

McAllister, J., O’Neill, M. & Pelcat, M., 01 Sep 2016, In : Journal of Signal Processing Systems. 84, 3, p. 293-294 2 p.

Research output: Contribution to journalEditorial

Streaming Elements for FPGA Signal and Image Processing Accelerators

Wang, P. & McAllister, J., 06 Jan 2016, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 6, p. 2262-2274 13 p.

Research output: Contribution to journalArticle

Open Access
File
12 Citations (Scopus)
427 Downloads (Pure)
2017
Open Access
File
2 Citations (Scopus)
260 Downloads (Pure)

FPGA-based implementation of Signal Processing Systems

Woods, R., McAllister, J., Lightbody, G. & Yi, Y., Apr 2017, 2 ed. UK: Chichester: John Wiley & Son. 356 p.

Research output: Book/ReportBook