Projects per year
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- 25 Similar Profiles
Cryptography
Engineering & Materials Science
Field programmable gate arrays (FPGA)
Engineering & Materials Science
Hardware
Engineering & Materials Science
Adders
Engineering & Materials Science
Computer hardware
Engineering & Materials Science
Authentication
Engineering & Materials Science
Cellular automata
Engineering & Materials Science
Semiconductor quantum dots
Engineering & Materials Science
Network
Recent external collaboration on country level. Dive into details by clicking on the dots.
Projects 2004 2019
R1081ECI: Phase 2 Quantum Technologies Hub proposal
O'Neill, M., Khalid, A. & Rafferty, C.
10/07/2019 → …
Project: Research
R1783ECI: DeepSecurity - The Application of Deep Learning to Hardware Security
21/06/2017 → …
Project: Research
R3924ECI: CSIT Phase 2
McCanny, J., Martinez del Rincon, J., McLaughlin, K., Miller, P., O'Kane, P., O'Neill, M., O'Sullivan, E., Rafferty, C., Scott-Hayward, S., Sezer, S. & Zhou, H.
03/05/2017 → …
Project: Research
Research Output 2000 2019
Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler
Brannigan, S., O'Neill, M., Khalid, A. & Rafferty, C., 11 Jan 2019, 8th International Conference on Security, Privacy, and Applied Cryptography Engineering: Proceedings. Springer-Verlag, p. 65-84 (Lecture Notes in Computer Science).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open Access
File
Data storage equipment
Sampling
Digital arithmetic
Quantum cryptography
Gaussian distribution
A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation
Gu, C., Liu, W., Cui, Y., Hanley, N., O'Neill, M. & Lombardi, F., 05 Sep 2019, In : IEEE Transactions on Emerging Topics in Computing (TETC) .Research output: Contribution to journal › Article
Open Access
File
Flip flop circuits
Field programmable gate arrays (FPGA)
Entropy
Hardware security
A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs
Gu, C., Chang, C. H., Liu, W., Hanley, N., Miskelly, J. & O'Neill, M., 15 Aug 2019, (Accepted) Workshop on Attacks and Solutions in Hardware Security (ASHES) 15/11/2019 → … London, United Kingdom. IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Field programmable gate arrays (FPGA)
Entropy
Benchmarking
Hardware security
A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication
Gu, C., Chang, C. H., Liu, W., Yu, S., Ma, Q. & O'Neill, M., 16 Sep 2019, (Accepted) Asian Hardware Oriented Security and Trust Symposium (AsianHOST). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Authentication
Servers
Network protocols
Multiplexing
Learning systems
An Improved Automatic Hardware Trojan Generation Platform
Yu, S., Liu, W. & O'Neill, M., 19 Sep 2019, IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE , p. 302-307 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open Access
File
Networks (circuits)
Hardware security
Observability
Controllability
Learning systems
Datasets
PicoPUF Dataset
Gu, C. (Creator), Hanley, N. (Creator), Miskelly, J. (Creator), O'Neill, M. (Creator), Queen's University Belfast, 20 Aug 2019
Dataset
File
Prizes
Electronic communication
British Female Inventor of the Year
Maire O'Neill (Recipient), 2007
Prize: National/international honour
European Union Women Inventors & Innovators
Maire O'Neill (Recipient), 2007
Prize: National/international honour
data security
innovator
Berlin
Fellow of the Irish Academy of Engineering
Maire O'Neill (Recipient), 2015
Prize: Election to learned society
INVENT2015
Chongyan Gu (Recipient), Neil Hanley (Recipient) & Maire O'Neill (Recipient), Sep 2015
Prize: Prize (including medals and awards)
Northern Ireland
Activities 2004 2019
Chip Hong Chang
Chongyan Gu (Host), Maire O'Neill (Host)29 Jul 2019 → 30 Jul 2019
Activity: Hosting a visitor types › Hosting an academic visitor
File
IET COMPUTERS AND DIGITAL TECHNIQUES (Journal)
Maire O'Neill (Peer reviewer)2017
Activity: Publication peer-review and editorial work types › Publication peer-review
IEEE International Symposium on Circuits and Systems, ISCAS 2017
Maire O'Neill (Advisor)2017
Activity: Consultancy types › Contribution to the work of national or international committees and working groups
Integration, the VLSI Journal (Journal)
Maire O'Neill (Peer reviewer)2017
Activity: Publication peer-review and editorial work types › Publication peer-review
EURASIP Journal on Applied Signal Processing (Journal)
Maire O'Neill (Peer reviewer)2017
Activity: Publication peer-review and editorial work types › Publication peer-review
Thesis
Lightweight Physical Unclonable Functions Circuit Design and Analysis
Author: Gu, C., 02 Jun 2016Supervisor: O'Neill, M. (Supervisor), O'Sullivan, E. (Supervisor) & Murphy, J. (Supervisor)
Student thesis: Doctoral Thesis › Doctor of Philosophy