• Room 07.021 - Ashby Tower

    United Kingdom

Accepting PhD Students

PhD projects

There are PhD opportunities open in creation of innovative embedded systems: - New Edge Computing Solutions for Machine Learning - Physical Layer Security Approaches for Internet-of-Things - Advanced Data Analysis for Manufacturing Applications

1988 …2020

Research output per year

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Research Output

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Paper
2017

Angle of Arrival based Indoor Localization with Cooperative MIMO Beamforming Scheme

Tao, C., Zhou, B., Woods, R. & Marshall, A., 01 Jul 2017.

Research output: Contribution to conferencePaper

Open Access
File
361 Downloads (Pure)
2016

FPGA Soft-core Processors, Compiler and Hardware Optimizations validated using HOG

Kelly, C., Siddiqui, F. M., Bardak, B., Wu, Y., Woods, R. & Rafferty, K., 24 Mar 2016.

Research output: Contribution to conferencePaper

2014

IPPro: FPGA based Image Processing Processor

Siddiqui, F. M., Russell, M., Bardak, B., Woods, R. & Rafferty, K., 20 Oct 2014.

Research output: Contribution to conferencePaper

File
12 Citations (Scopus)
1367 Downloads (Pure)

Secure Key Generation from OFDM Subcarriers’ Channel Response

Zhang, J., Marshall, A., Woods, R. & Duong, T. Q., Dec 2014.

Research output: Contribution to conferencePaper

File
21 Citations (Scopus)
269 Downloads (Pure)
2011

A Low Complexity Real-time MIMO-Preprocessing For Fixed Complexity Sphere Decoder

Chu, X., McAllister, J. & Woods, R., Nov 2011, p. 102-106. 5 p.

Research output: Contribution to conferencePaper

A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection

Chu, X., McAllister, J. & Woods, R., Mar 2011, p. 129-140. 12 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Design and implementation of a flexible queue manager for next generation networks

Zhang, Q., Woods, R. & Marshall, A., Nov 2011, p. 1124-1128. 5 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

GPU acceleration of Automated Speech Recognition for Mobile Devices

Veitch, R., Woods, R. & Aubert, L-M., Jul 2011, p. 1-1. 1 p.

Research output: Contribution to conferencePaper

How resistant are SBoxes to Power Analysis Attacks?”,

Boey, H. K., O'Neill, M. & Woods, R., Feb 2011, p. 1-6. 6 p.

Research output: Contribution to conferencePaper

2 Citations (Scopus)

Tree-Based Adaptive Spatial Detection for Adaptive Modulated MIMO Systems

Zheng, C., Wu, Y., McAllister, J. & Woods, R., Nov 2011, p. 107-113. 5 p.

Research output: Contribution to conferencePaper

2010

Acceleration Of HMM-Based Speech Recognition System By Parallel FPGA Gaussian Calculation

Veitch, R., Aubert, L-M., Woods, R. & Fischaber, S., Mar 2010, p. 197-200. 4 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Adapting noisy speech models – extended uncertainty decoding

Lu, J., Ji, M. & Woods, R., Mar 2010, p. 4322-4325. 4 p.

Research output: Contribution to conferencePaper

Open Access
File
2 Citations (Scopus)
7 Downloads (Pure)

A Scalable and Programmable Modular Queue Manager Architecture

Zhang, Q., Woods, R. & Marshall, A., Nov 2010, p. 1124-1128. 5 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Differential Power Analysis of CAST-128

Boey, K. H., Lu, L., O'Neill, M. & Woods, R., Jul 2010, p. 143-148. 6 p.

Research output: Contribution to conferencePaper

2 Citations (Scopus)

FPGA based Soft-core SIMD Processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder Case Study

Chu, X., McAllister, J. & Woods, R., Dec 2010, p. 497-484. 8 p.

Research output: Contribution to conferencePaper

13 Citations (Scopus)

High-Level Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks

McGlone, J., Woods, R., Marshall, A. & Blott, M., Jul 2010, p. 37-44. 8 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Random Clock against Differential Power Analysis

Boey, H. K., O'Neill, M. & Woods, R., Dec 2010, p. 756-759. 4 p.

Research output: Contribution to conferencePaper

14 Citations (Scopus)

Regular-Choice Petri Nets for MIMO Detectors

Zheng, C., McAllister, J. & Woods, R., Oct 2010, p. 180-185. 6 p.

Research output: Contribution to conferencePaper

2009

An Attack-Resilient Sampling Mechanism for Integrated IP Flow Monitors

McGlone, J., Marshall, A. & Woods, R., Jun 2009, p. 233-238. 6 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

A Traffic Manager for Integrated Queuing and Scheduling of Unicast and Multicast IP Traffic

Zhang, Q., Marshall, A. & Woods, R., May 2009, p. 65-70. 6 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Replacing Uncertainty Decoding with Subband Re-Estimation for Large Vocabulary

Lu, J., Ji, M. & Woods, R., Sep 2009, p. 2407-2410. 4 p.

Research output: Contribution to conferencePaper

2 Citations (Scopus)
2008

A Distributed Network Monitor for Flow Detection and Classification

McGlone, J., Marshall, A. & Woods, R., Apr 2008, p. 871-874. 4 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Algorithmic Factorisation for Low Power FPGA Implementations Through Increased Data Locality

McKeown, M., Woods, R. & McAllister, J., Apr 2008, p. 271-274. 4 p.

Research output: Contribution to conferencePaper

5 Citations (Scopus)

A real-time flow monitor architecture encompassing on-demand monitoring functions

McGlone, J., Marshall, A. & Woods, R., Apr 2008, p. 871-874. 4 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Combining noise compensation and missing-feature decoding for large vocabulary speech recognition in noise

Lu, J., Ji, M. & Woods, R., Sep 2008, p. 1269-1272. 4 p.

Research output: Contribution to conferencePaper

Novel percussive instrument design - Converting mathematical formulae into engaging musical instruments

Chuchacz, K., Woods, R. & O'Modhrain, S., 01 Jan 2008.

Research output: Contribution to conferencePaper

QR Recursive Least Squares IP Core Example

Lightbody, G. & Woods, R., Mar 2008, p. 369-374. 6 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Towards a real-time implementation of a physical modelling based percussion synthesizer

Chuchcaz, K., Woods, R. & O'Modhrain, S., May 2008, p. 1-1. 1 p.

Research output: Contribution to conferencePaper

2007

DESIGN METHODOLOGY FOR A BLOCK MOTION ESTIMATION IP CORE

Turner, R., Woods, R., Fischaber, S. & McAllister, J., Jun 2007, p. 711-716. 6 p.

Research output: Contribution to conferencePaper

Physical models and musical controllers: Designing a novel electronic percussion instrument

Chuchacz, K., O'Modhrain, S. & Woods, R., 01 Dec 2007, p. 37-40. 4 p.

Research output: Contribution to conferencePaper

8 Citations (Scopus)

Programmable network functionality for improved QoS of interactive video traffic

McAllister, B., Marshall, A. & Woods, R., Nov 2007, p. 283-296. 14 p.

Research output: Contribution to conferencePaper

Programmable SoC processor for video object recognition and tracking applications

Kurnarasamy, M., Woods, R. & Miller, P., Nov 2007, p. 2004-2008. 5 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

SoC Memory Hierarchy Derivation from Dataflow Graphs

Fischaber, S., Woods, R. & McAllister, J., Oct 2007, p. 469-474. 6 p.

Research output: Contribution to conferencePaper

10 Citations (Scopus)
2006

Improving the delivery of Interactive Video over QoS enabled IP Networks

McAllister, B., Marshall, A. & Woods, R., May 2006.

Research output: Contribution to conferencePaper

Muir Hardware Synthesis for Multimedia Applications

Fischaber, S., McAllister, J., Woods, R. & Malins, E., Nov 2006, p. 1-13. 13 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Providing Input-Output Throughput Guarantees in a Buffered Crossbar Switch

O'Neill, S., Marshall, A. & Woods, R., Jun 2006, p. 725-730. 6 p.

Research output: Contribution to conferencePaper

2005

FPGA-based hardware for physical modelling sound synthesis by finite difference schemes

Motuk, E., Woods, R. & Bilbao, S., Dec 2005, p. 103-110. 8 p.

Research output: Contribution to conferencePaper

8 Citations (Scopus)

FPGA-based physical modeling hardware for musical sound synthesis

Motuk, E., Woods, R. & Dr, S. B., Dec 2005, p. 103-110. 8 p.

Research output: Contribution to conferencePaper

FPGA Core Network Implementation and Optimization: A Case Study

Fischaber, S., Hasson, R., McAllister, J. & Woods, R., Dec 2005, p. 319-320. 2 p.

Research output: Contribution to conferencePaper

Implementation of finite difference schemes for the wave equation on FPGA

Motuk, E., Woods, R. & Bilbao, S., Mar 2005, p. III237-III240. 4 p.

Research output: Contribution to conferencePaper

16 Citations (Scopus)

Novel Network Functionality for Interactive layered MPEG-4 Video Conferencing

McAllister, B., Marshall, A. & Woods, R., Mar 2005, p. 61-62. 2 p.

Research output: Contribution to conferencePaper

Programmable Network Functionality for Improved QoS of Interactive Video Traffic

McAllister, B., Marshall, A. & Woods, R., Nov 2005.

Research output: Contribution to conferencePaper

Rapid Generation of Hardware Functionality in Heterogeneous Platforms

Reilly, D., Woods, R., McAllister, J. & Walke, R., Mar 2005, p. V65-V68. 4 p.

Research output: Contribution to conferencePaper

2004

Embedded Context Aware Hardware Component Generation for Dataflow System Exploration

McAllister, J., Woods, R. & Walke, R., Jul 2004, p. 254-263. 10 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Synthesis and High Level Optimisation of Multidimensional Dataflow Actor Network on FPGA

McAllister, J., Woods, R., Walke, R. & Reilly, D., Sep 2004, p. 164-169. 6 p.

Research output: Contribution to conferencePaper

9 Citations (Scopus)
2003

A Parameterisable Motion Estimation Core

LeRiguer, E., Woods, R. & Turner, R., Oct 2003.

Research output: Contribution to conferencePaper

Design Technologies for DSP Algorithm Implementation on Heterogeneous Architectures

McAllister, J., Yi, Y., Woods, R., Walke, R., Reilly, D. & Colgan, K., Aug 2003, p. 585-596. 12 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Hierarchical DSP architectural synthesis and scheduling solution for “IRIS”

Yi, Y., Woods, R. & Turner, R., Aug 2003, p. 375-380. 6 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)
2002

FPGA-based System-level design framework based on the IRIS synthesis tool and System Generator

Yi, Y. & Woods, R., Dec 2002, p. 85-92. 8 p.

Research output: Contribution to conferencePaper

7 Citations (Scopus)

High sampling rate retimed DLMS filter implementations in Virtex-II FPGA

Yi, Y., Woods, R., Ting, L. K. & Cowan, C., Oct 2002, p. 139-145. 7 p.

Research output: Contribution to conferencePaper

12 Citations (Scopus)