Skip to main navigation Skip to search Skip to main content

A 0.09-pJ/bit logic-compatible multiple-time programmable (MTP) memory-based PUF design for IoT applications

  • Shuming Guo
  • , Yinyin Lin
  • , Hao Wang
  • , Yao Li
  • , Chongyan Gu
  • , Weiqiang Liu
  • , Yijun Cui*
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

The Internet of Things (IoT) allows devices to interact for real-time data transfer and remote control. However, IoT hardware devices have been shown security vulnerabilities. Edge device authentications, as a crucial process for IoT systems, generate and use unique IDs for secure data transmissions. Conventional authentication techniques, computational and heavyweight, are challenging and infeasible in IoT due to limited resources in IoTs. Physical unclonable functions (PUFs), a lightweight hardware-based security primitive, were proposed for resource-constrained applications. We propose a new PUF design for resource-constrained IoT devices based on low-cost logic-compatible multiple-time programmable (MTP) memory cells. The structure includes an array of MTP differential memory cells and a PUF extraction circuit. The extraction method uses the random distribution of BL current after programming each memory cell in logic-compatible MTP memory as the entropy source of PUF. Responses are obtained by comparing the current values of two memory cells under a certain address by challenge, forming challenge-response pairs (CRPs). This scheme does not increase hardware consumption and circuit differences on edge devices and is intrinsic PUF. Finally, 200 PUF chips were fabricated by CSMC based on the 0.153-μ m MCU single-gate CMOS process. The performance of the logic-compatible MTP memory cell and its PUF was evaluated. A logic-compatible MTP cell has good programming erase efficiency and good durability and retention. The uniqueness of the proposed PUF is 50.29%, the uniformity is 51.82%, and the reliability is 93.61%.

Original languageEnglish
Pages (from-to)248-260
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume33
Issue number1
Early online date27 Nov 2024
DOIs
Publication statusPublished - Jan 2025

Bibliographical note

Publisher Copyright:
© 1993-2012 IEEE.

Keywords

  • Hardware security
  • multiple-time programmable (MTP)
  • nonvolatile memory (NVM)
  • physical unclonable function (PUF)

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'A 0.09-pJ/bit logic-compatible multiple-time programmable (MTP) memory-based PUF design for IoT applications'. Together they form a unique fingerprint.

Cite this