Abstract
Details of a new low power fast Fourier transform (FFT) processor for use in digital television applications are presented. This has been fabricated using a 0.6-µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-time video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8 × 8 mm and dissipates 1 W. The chip design is based on a novel VLSI architecture which has been derived from a first principles factorization of the discrete Fourier transform (DFT) matrix and tailored to a direct silicon implementation.
Original language | English |
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Pages (from-to) | 1751-1760 |
Number of pages | 10 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 31 |
Issue number | 11 |
Publication status | Published - 01 Nov 1996 |