A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS

Matthew Love; Mury Thian; Floris van der Wilt; Koen van Hartingsveldt; Kave Kianush

doi:10.1109/ICECS.2018.8617902

A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS

Matthew Love, Mury Thian, Floris van der Wilt, Koen van Hartingsveldt, Kave Kianush

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

811 Downloads (Pure)

Abstract

A novel lumped-element Wilkinson power combiner designed at 5 GHz on a 28 nm bulk CMOS process is presented. The core circuit requires only three components with two additional capacitors used to implement a second harmonic trap, further reducing the circuit area and output distortion. The circuit uses a single coupled coil to provide two series inductances used in the combiner. Additionally, the coil parasitics provide the isolation resistance, removing the need for a discrete resistor. Design equations and methodology for the coupled coil are given along with integrated circuit (IC) measurement results. Return losses (RL) and isolation are greater than 10.1 dB from 4.3 GHz to 5.3 GHz with the insertion loss (IL) lower than 1.2 dB. The active circuit dimensions are 261 μm×346 μm giving an area of 0.09 mm 2 .

Original language	English
Title of host publication	25th IEEE International Conference on Electronics Circuits and Systems (ICECS)
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	441-444
Number of pages	4
ISBN (Electronic)	978-1-5386-9562-3
DOIs	https://doi.org/10.1109/ICECS.2018.8617902
Publication status	Published - 21 Jan 2019
Event	25th IEEE International Conference on Electronics Circuits and Systems - Bordeaux, France Duration: 09 Dec 2018 → 12 Dec 2018

Conference

Conference	25th IEEE International Conference on Electronics Circuits and Systems
Abbreviated title	IEEE ICECS
Country/Territory	France
City	Bordeaux
Period	09/12/2018 → 12/12/2018

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10.1109/ICECS.2018.8617902Licence: Unspecified

A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS
© 2018 IEEE. This work is made available online in accordance with the publisher’s policies. Please refer to any applicable terms of use of the publisher.
Accepted author manuscript, 2.19 MBLicence: Unspecified

Best Paper Award at the 25th IEEE ICECS 2018
Love, Matthew (Recipient), Thian, Mury (Recipient), van der Wilt, Floris (Recipient), van Hartingsveldt, Koen (Recipient) & Kianush, Kave (Recipient), 12 Dec 2018
Prize: Prize (including medals and awards)

Efficiency improvement in nanometre CMOS outphasing power amplifiers
Love, M. (Author), Buchanan, N. (Supervisor) & Zelenchuk, D. (Supervisor), Jul 2021
Student thesis: Doctoral Thesis › Doctor of Philosophy

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@inproceedings{2a21a82d4d3c48bc817416dea5aa0a56,

title = "A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS",

abstract = "A novel lumped-element Wilkinson power combiner designed at 5 GHz on a 28 nm bulk CMOS process is presented. The core circuit requires only three components with two additional capacitors used to implement a second harmonic trap, further reducing the circuit area and output distortion. The circuit uses a single coupled coil to provide two series inductances used in the combiner. Additionally, the coil parasitics provide the isolation resistance, removing the need for a discrete resistor. Design equations and methodology for the coupled coil are given along with integrated circuit (IC) measurement results. Return losses (RL) and isolation are greater than 10.1 dB from 4.3 GHz to 5.3 GHz with the insertion loss (IL) lower than 1.2 dB. The active circuit dimensions are 261 μm×346 μm giving an area of 0.09 mm 2 .",

author = "Matthew Love and Mury Thian and {van der Wilt}, Floris and {van Hartingsveldt}, Koen and Kave Kianush",

year = "2019",

month = jan,

day = "21",

doi = "10.1109/ICECS.2018.8617902",

language = "English",

pages = "441--444",

booktitle = "25th IEEE International Conference on Electronics Circuits and Systems (ICECS)",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "25th IEEE International Conference on Electronics Circuits and Systems, IEEE ICECS ; Conference date: 09-12-2018 Through 12-12-2018",

}

Love, M, Thian, M, van der Wilt, F, van Hartingsveldt, K & Kianush, K 2019, A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS. in 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). Institute of Electrical and Electronics Engineers Inc., pp. 441-444, 25th IEEE International Conference on Electronics Circuits and Systems, Bordeaux, France, 09/12/2018. https://doi.org/10.1109/ICECS.2018.8617902

A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS. / Love, Matthew; Thian, Mury; van der Wilt, Floris et al.
25th IEEE International Conference on Electronics Circuits and Systems (ICECS). Institute of Electrical and Electronics Engineers Inc., 2019. p. 441-444.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS

AU - Love, Matthew

AU - Thian, Mury

AU - van der Wilt, Floris

AU - van Hartingsveldt, Koen

AU - Kianush, Kave

PY - 2019/1/21

Y1 - 2019/1/21

N2 - A novel lumped-element Wilkinson power combiner designed at 5 GHz on a 28 nm bulk CMOS process is presented. The core circuit requires only three components with two additional capacitors used to implement a second harmonic trap, further reducing the circuit area and output distortion. The circuit uses a single coupled coil to provide two series inductances used in the combiner. Additionally, the coil parasitics provide the isolation resistance, removing the need for a discrete resistor. Design equations and methodology for the coupled coil are given along with integrated circuit (IC) measurement results. Return losses (RL) and isolation are greater than 10.1 dB from 4.3 GHz to 5.3 GHz with the insertion loss (IL) lower than 1.2 dB. The active circuit dimensions are 261 μm×346 μm giving an area of 0.09 mm 2 .

AB - A novel lumped-element Wilkinson power combiner designed at 5 GHz on a 28 nm bulk CMOS process is presented. The core circuit requires only three components with two additional capacitors used to implement a second harmonic trap, further reducing the circuit area and output distortion. The circuit uses a single coupled coil to provide two series inductances used in the combiner. Additionally, the coil parasitics provide the isolation resistance, removing the need for a discrete resistor. Design equations and methodology for the coupled coil are given along with integrated circuit (IC) measurement results. Return losses (RL) and isolation are greater than 10.1 dB from 4.3 GHz to 5.3 GHz with the insertion loss (IL) lower than 1.2 dB. The active circuit dimensions are 261 μm×346 μm giving an area of 0.09 mm 2 .

U2 - 10.1109/ICECS.2018.8617902

DO - 10.1109/ICECS.2018.8617902

M3 - Conference contribution

SP - 441

EP - 444

BT - 25th IEEE International Conference on Electronics Circuits and Systems (ICECS)

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 25th IEEE International Conference on Electronics Circuits and Systems

Y2 - 9 December 2018 through 12 December 2018

ER -

A Compact 5 GHz Lumped-Element Wilkinson Power Combiner on 28 nm Bulk CMOS

Abstract

Conference

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Prizes

Best Paper Award at the 25th IEEE ICECS 2018

Student theses

Efficiency improvement in nanometre CMOS outphasing power amplifiers

Cite this