In this paper, a highly reliable SRAM based Physical Unclonable Function (PUF), which retains the memory function is proposed. The mismatch of NMOS is extracted during discharge process and amplified by the cross-coupled inverter to generate a response. At the beginning of the discharge process, the NMOSs are biased at sub-threshold region, which can improve the reliability and stability. The proposed PUF is designed in a 40nm CMOS process and each bit cell only consumes 4.98 μm 2 (3112F 2 ). Post simulation shows that the bit error rate (BER) deterioration is 0.96% per 0.1V, 0.36% per 10°C with temperature variations from -40°C to 80°C and supply voltage variations from 0.9V to 1.3V. It achieves 1.8% native instability through the simulation. Meanwhile, the proposed PUF can retain memory function after a response is generated.
|Title of host publication||2021 IEEE International Symposium on Circuits and Systems (ISCAS)|
|Publisher|| IEEE |
|Number of pages||5|
|Publication status||Published - 27 Apr 2021|
|Name|| IEEE International Symposium on Circuits and Systems (ISCAS): Proceedings|