A High Throughput FPGA Implementation of a Bit-Level Matrix-Matrix Product

Abbes Amira, Ahmed Bouridane, Peter Milligan, Paul Sage

Research output: Contribution to conference › Paper

Original language	English
Pages	1-4
Number of pages	4
Publication status	Published - Aug 2000
Event	43rd IEEE Midwest Symposium on Circuits and Systems - Michigan, United States Duration: 01 Aug 2000 → 01 Aug 2000

Conference	43rd IEEE Midwest Symposium on Circuits and Systems
Country/Territory	United States
City	Michigan
Period	01/08/2000 → 01/08/2000

Cite this

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title = "A High Throughput FPGA Implementation of a Bit-Level Matrix-Matrix Product",

author = "Abbes Amira and Ahmed Bouridane and Peter Milligan and Paul Sage",

year = "2000",

month = aug,

language = "English",

pages = "1--4",

note = "43rd IEEE Midwest Symposium on Circuits and Systems ; Conference date: 01-08-2000 Through 01-08-2000",

}

TY - CONF

T1 - A High Throughput FPGA Implementation of a Bit-Level Matrix-Matrix Product

AU - Amira, Abbes

AU - Bouridane, Ahmed

AU - Milligan, Peter

AU - Sage, Paul

PY - 2000/8

Y1 - 2000/8

UR - http://www.scopus.com/inward/record.url?scp=0034464818&partnerID=8YFLogxK

M3 - Paper

SP - 1

EP - 4

T2 - 43rd IEEE Midwest Symposium on Circuits and Systems

Y2 - 1 August 2000 through 1 August 2000

ER -