A Reconfigurable Memory PUF ased on Tristate Inverter Arrays

Yijun Cui, Chenghua Wang, Weiqiang Liu, Maire O'Neill

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

A Physical Unclonable Function (PUF) is a promising security primitive for low cost security solutions. It is especially attractive for resource constrained platforms such as internet-of-things (IoT) devices. A novel Tristate Static Random Access Memory (TSRAM) PUF design consisting of two cross-coupled tristate inverter arrays is proposed in this paper. This new PUF structure is able to reconfigure the cross-coupled inverters so that it can produce effective challenge-response pairs (CRPs) without using any additional auxiliary processing, which is not available in previous memory based PUFs. The functionality and performance of the proposed TSRAM PUF is validated by both simulation with UMC 65nm technology and practical experimentation on a Xilinx Virtex-H FPGA. The proposed TSRAM PUF demonstrates good uniqueness and reliability and it uses the smallest number of gates to produce one response bit compared with previous works.

Original languageEnglish
Title of host publicationIEEE International Workshop on Signal Processing Systems, SiPS 2016: Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages171-176
Number of pages6
ISBN (Electronic)9781509033614
DOIs
Publication statusPublished - 12 Dec 2016
Event2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016 - Dallas, United States
Duration: 26 Oct 201628 Oct 2016

Publication series

NameIEEE International Workshop on Signal Processing Systems (SiPS)
PublisherIEEE
ISSN (Electronic)2374-7390

Conference

Conference2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016
CountryUnited States
CityDallas
Period26/10/201628/10/2016

Keywords

  • Physical unclonable function
  • Tristate inverter arrays
  • TSRAM PUF
  • Uniqueness and reliability

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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  • Cite this

    Cui, Y., Wang, C., Liu, W., & O'Neill, M. (2016). A Reconfigurable Memory PUF ased on Tristate Inverter Arrays. In IEEE International Workshop on Signal Processing Systems, SiPS 2016: Proceedings (pp. 171-176). [7780092] (IEEE International Workshop on Signal Processing Systems (SiPS)). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SiPS.2016.38