A unique and robust single slice FPGA identification generator

Chongyan Gu, Julian Murphy, Maire O'Neill

Research output: Chapter in Book/Report/Conference proceedingConference contribution

32 Citations (Scopus)

Abstract

In this paper, a new field-programmable gate array (FPGA) identification generator circuit is introduced based on physically unclonable function (PUF) technology. The new identification generator is able to convert flip-flop delay path variations to unique n-bit digital identifiers (IDs), while requiring only a single slice per ID bit by using 1-bit ID cells formed as hard-macros. An exemplary 128-bit identification generator is implemented on ten Xilinx Spartan-6 FPGA devices. Experimental results show an uniqueness of 48.52%, and reliability of 92.41% over a 25°C to 70°C temperature range and 10% fluctuation in supply voltage
Original languageEnglish
Title of host publicationCircuits and Systems (ISCAS), 2014 IEEE International Symposium on
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1223-1226
Number of pages4
ISBN (Print)9781479934317
DOIs
Publication statusPublished - 01 Jun 2014
EventIEEE International Symposium on Circuits and Systems - Melbourne, Australia
Duration: 01 Jun 201407 Jun 2014

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Country/TerritoryAustralia
CityMelbourne
Period01/06/201407/06/2014

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