A Virtex FPGA Implementation of Matrix Product Based on 2-D Bit-Level Systolic Architecture

Abbes Amira, Ahmed Bouridane, Peter Milligan, M. Nibouche

Research output: Contribution to conference › Paper

Original language	English
Pages	1-8
Number of pages	8
Publication status	Published - Nov 2000
Event	1st International Conference on Electronic Engineering - Bourmedes, Algeria Duration: 01 Nov 2000 → 01 Nov 2000

Conference	1st International Conference on Electronic Engineering
Country/Territory	Algeria
City	Bourmedes
Period	01/11/2000 → 01/11/2000

Cite this

@conference{d7fc5256a0ce4007ba28bd24a4cc7bf7,

title = "A Virtex FPGA Implementation of Matrix Product Based on 2-D Bit-Level Systolic Architecture",

author = "Abbes Amira and Ahmed Bouridane and Peter Milligan and M. Nibouche",

year = "2000",

month = nov,

language = "English",

pages = "1--8",

note = "1st International Conference on Electronic Engineering ; Conference date: 01-11-2000 Through 01-11-2000",

}