Abstract
The paper describes the implementation of the arithmetic operations of multiplication, division and square root on a Xilinx XC6200 FPGA. By using a design approach to enhance similarities across circuits, partial reconfiguration has been used to allow reductions in reconfiguration times of up to 75% on trials using the VCC HOTWorks board.
| Original language | English |
|---|---|
| Title of host publication | IEEE Symposium on FPGAs for Custeleom Computing Machines |
| Pages | 260-261 |
| Number of pages | 2 |
| Publication status | Published - 01 Dec 1999 |
| Event | Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCMM 1999) - Napa Valley, CA, United States Duration: 21 Apr 1999 → 23 Apr 1999 |
Publication series
| Name | IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings |
|---|---|
| ISSN (Print) | 1082-3409 |
Conference
| Conference | Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCMM 1999) |
|---|---|
| Country | United States |
| City | Napa Valley, CA |
| Period | 21/04/1999 → 23/04/1999 |
ASJC Scopus subject areas
- Computer Science(all)
- Engineering(all)
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Cite this
Heron, J. P., & Woods, R. F. (1999). Accelerating run-time reconfiguration on FCCMs. In IEEE Symposium on FPGAs for Custeleom Computing Machines (pp. 260-261). (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings).