Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware

Donal Campbell; Ciara Rafferty; Ayesha Khalid; Maire O'Neill

doi:10.1109/FPL57034.2022.00079

Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware

Donal Campbell, Ciara Rafferty, Ayesha Khalid, Maire O'Neill

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This research investigates efficient architectures for the implementation of the CRYSTALS-Dilithium post-quantum digital signature scheme on reconfigurable hardware, in terms of speed, memory usage, power consumption and resource utilisation. Post quantum digital signature schemes involve a significant computational effort, making efficient hardware accelerators an important contributor to future adoption of schemes. This is work in progress, comprising the establishment of a comprehensive test environment for operational profiling, and the investigation of the use of novel architectures to achieve optimal performance.

Original language	English
Title of host publication	32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	462-463
Number of pages	2
ISBN (Electronic)	978-1-6654-7390-3
ISBN (Print)	978-1-6654-7391-0
DOIs	https://doi.org/10.1109/FPL57034.2022.00079 https://doi.org/10.1109/FPL57034.2022.00079
Publication status	Published - 13 Feb 2023
Event	32nd International Conference on Field-Programmable Logic and Applications 2022 - Belfast, United Kingdom Duration: 29 Aug 2022 → 02 Sept 2022

Publication series

Name	International Conference on Field-Programmable Logic and Applications (FPL): Proceedings
Publisher	IEEE
ISSN (Print)	1946-147X
ISSN (Electronic)	1946-1488

Conference

Conference	32nd International Conference on Field-Programmable Logic and Applications 2022
Abbreviated title	FPL 2022
Country/Territory	United Kingdom
City	Belfast
Period	29/08/2022 → 02/09/2022

Bibliographical note

Funding Information:
This research was supported in part by EPSRC Quantum Communications Hub grant EP/T001011/1.

Publisher Copyright:
© 2022 IEEE.

Keywords

Post-Quantum Cryptography computing , Power demand , Memory management , Computational efficiency , Resource management
Digital signatures

ASJC Scopus subject areas

Artificial Intelligence
Computer Science Applications
Software
Control and Optimization
Instrumentation
Hardware and Architecture

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Cite this

Campbell, D., Rafferty, C., Khalid, A., & O'Neill, M. (2023). Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. In 32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings (pp. 462-463). (International Conference on Field-Programmable Logic and Applications (FPL): Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPL57034.2022.00079, https://doi.org/10.1109/FPL57034.2022.00079

Campbell, Donal ; Rafferty, Ciara ; Khalid, Ayesha et al. / Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. 32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. pp. 462-463 (International Conference on Field-Programmable Logic and Applications (FPL): Proceedings).

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title = "Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware",

abstract = "This research investigates efficient architectures for the implementation of the CRYSTALS-Dilithium post-quantum digital signature scheme on reconfigurable hardware, in terms of speed, memory usage, power consumption and resource utilisation. Post quantum digital signature schemes involve a significant computational effort, making efficient hardware accelerators an important contributor to future adoption of schemes. This is work in progress, comprising the establishment of a comprehensive test environment for operational profiling, and the investigation of the use of novel architectures to achieve optimal performance.",

keywords = "Post-Quantum Cryptography computing , Power demand , Memory management , Computational efficiency , Resource management, Digital signatures",

author = "Donal Campbell and Ciara Rafferty and Ayesha Khalid and Maire O'Neill",

note = "Funding Information: This research was supported in part by EPSRC Quantum Communications Hub grant EP/T001011/1. Publisher Copyright: {\textcopyright} 2022 IEEE.; 32nd International Conference on Field-Programmable Logic and Applications 2022, FPL 2022 ; Conference date: 29-08-2022 Through 02-09-2022",

year = "2023",

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doi = "10.1109/FPL57034.2022.00079",

language = "English",

isbn = "978-1-6654-7391-0",

series = "International Conference on Field-Programmable Logic and Applications (FPL): Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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booktitle = "32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings",

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Campbell, D, Rafferty, C , Khalid, A & O'Neill, M 2023, Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. in 32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings. International Conference on Field-Programmable Logic and Applications (FPL): Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 462-463, 32nd International Conference on Field-Programmable Logic and Applications 2022, Belfast, United Kingdom, 29/08/2022. https://doi.org/10.1109/FPL57034.2022.00079, https://doi.org/10.1109/FPL57034.2022.00079

Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. / Campbell, Donal; Rafferty, Ciara ; Khalid, Ayesha et al.
32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. p. 462-463 (International Conference on Field-Programmable Logic and Applications (FPL): Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Khalid, Ayesha

AU - O'Neill, Maire

PY - 2023/2/13

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N2 - This research investigates efficient architectures for the implementation of the CRYSTALS-Dilithium post-quantum digital signature scheme on reconfigurable hardware, in terms of speed, memory usage, power consumption and resource utilisation. Post quantum digital signature schemes involve a significant computational effort, making efficient hardware accelerators an important contributor to future adoption of schemes. This is work in progress, comprising the establishment of a comprehensive test environment for operational profiling, and the investigation of the use of novel architectures to achieve optimal performance.

AB - This research investigates efficient architectures for the implementation of the CRYSTALS-Dilithium post-quantum digital signature scheme on reconfigurable hardware, in terms of speed, memory usage, power consumption and resource utilisation. Post quantum digital signature schemes involve a significant computational effort, making efficient hardware accelerators an important contributor to future adoption of schemes. This is work in progress, comprising the establishment of a comprehensive test environment for operational profiling, and the investigation of the use of novel architectures to achieve optimal performance.

KW - Post-Quantum Cryptography computing , Power demand , Memory management , Computational efficiency , Resource management

KW - Digital signatures

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DO - 10.1109/FPL57034.2022.00079

M3 - Conference contribution

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SN - 978-1-6654-7391-0

T3 - International Conference on Field-Programmable Logic and Applications (FPL): Proceedings

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Campbell D, Rafferty C , Khalid A , O'Neill M. Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. In 32nd International Conference on Field-Programmable Logic and Applications (FPL): Proceedings. Institute of Electrical and Electronics Engineers Inc. 2023. p. 462-463. (International Conference on Field-Programmable Logic and Applications (FPL): Proceedings). doi: 10.1109/FPL57034.2022.00079, 10.1109/FPL57034.2022.00079

Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

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