Abstract
In an era of continuously shrinking technology and escalating power density, Multiprocessor System on Chips (MPSoCs) suffer from a growing prominence of device defects and increase of dependability-related issues. This paper tackles the dependability challenge by suggesting an adaptive reliability enhancement strategy for multicore systems. We dynamically adapt the reliability enhancement to the actual tasks requirements as well as cores runtime operating conditions. As reliability improvement may adversely affect the parameters of embedded systems, we suggest a runtime recovery method. In fact, we implement a 3-mode mapping technique to limit redundancy overheads through judicious task migrating and dropping. Our experiments show promising results in terms of error mitigation with controllable power and thermal overheads.
Original language | English |
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Title of host publication | Proceedings of the 20th Euromicro Conference on Digital System Design, DSD 2017 |
Editors | Hana Kubátová, Martin Novotný, Amund Skavhaug |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 538-542 |
Number of pages | 5 |
ISBN (Electronic) | 9781538621462 |
ISBN (Print) | 9781538621479 |
DOIs | |
Publication status | Published - 28 Sept 2017 |
Externally published | Yes |
Event | 20th Euromicro Conference on Digital System Design - Vienna, Austria Duration: 30 Aug 2017 → 01 Sept 2017 https://doi.org/10.1109/DSD42682.2017 |
Publication series
Name | Euromicro Symposium on Digital System Design: Proceedings |
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Publisher | IEEE |
Conference
Conference | 20th Euromicro Conference on Digital System Design |
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Abbreviated title | DSD |
Country/Territory | Austria |
City | Vienna |
Period | 30/08/2017 → 01/09/2017 |
Internet address |
Keywords
- dependability
- mapping
- Multicore
- reliability
ASJC Scopus subject areas
- Computer Science Applications
- Control and Systems Engineering
- Hardware and Architecture