Algorithms and architectures for high performance recursive filtering

S.E. McQuillan, J.V. McCanny

Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

2 Citations (Scopus)

Abstract

Recently, a number of most significant digit (msd) first bit parallel multipliers for recursive filtering have been reported. However, the design approach which has been used has, in general, been heuristic and consequently, optimality has not always been assured. In this paper, msd first multiply accumulate algorithms are described and important relationships governing the dependencies between latency, number representations, etc are derived. A more systematic approach to designing recursive filters is illustrated by applying the algorithms and associated relationships to the design of cascadable modules for high sample rate IIR filtering and wave digital filtering.
Original languageEnglish
Title of host publicationProceedings of the International Conference on Application
Pages230-244
Number of pages15
Publication statusPublished - 01 Jan 1992

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