An efficient component for designing signed reverse converters for a class of RNS moduli sets of composite form {2k,2P−1}

Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini*, Leonel Sousa, Mehdi Hosseinzadeh

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

10 Citations (Scopus)

Abstract

The application of residue number system (RNS) to digital signal processing lies in the ability to operate on signed numbers. However, the available RNS-to-binary (reverse) converters have been designed for unsigned numbers, which means that they do not produce signed outputs. Usually, some additional circuits are introduced at the output of the reverse converter to map the unsigned generated output into a signed number representation. This paper proposes a novel method to design reverse converters with signed output for a class of RNS moduli sets of composite form {2k, 2P -1}. The structure of the modulo adder used in the last stage of the proposed converters is modified in order to reuse the internal circuits to produce the signed output. This adder component is especially designed for achieving reverse converters with signed output, imposing very low area and delay overheads compared with unsigned converters. The proposed approach is applied to design reverse converters for different moduli sets and to implement application specific integrated circuits. Experimental results show that for a 4-moduli converter, the proposed design can outperform the traditional method to obtain signed outputs by improving the delay, chip-area, and energy consumption by up to 9%, 21%, and 35%, respectively.

Original languageEnglish
Pages (from-to)48-59
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume25
Issue number1
Early online date21 Jun 2016
DOIs
Publication statusPublished - Jan 2017
Externally publishedYes

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