An emulation of quantum error-correction on an FPGA device

Charles Gillan, John McAllister, Leo Rogers, Michael Hart*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Practical fault-tolerant quantum computation faces enormous engineering challenges and emulation is a key support for quantum algorithm development in the meantime. Field-Programmable Gate Array are promising hosts for these emulators but have seen almost no application to this problem so far. This paper presents emulation of an error-correct qubit via a 9-qubit Shor code on Xilinx FPGA. It shows how by exploiting sparsity linked to the errors, operational complexity can be reduced by more than 99% and high-fidelity operation enabled by 11-bit floating point computation.
Original languageEnglish
Title of host publication2021 31st International Conference on Field-Programmable Logic and Applications (FPL): proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages104-108
Number of pages5
ISBN (Electronic)9781665437592
ISBN (Print)9781665442435
DOIs
Publication statusPublished - 12 Oct 2021
Event31st International Conference on Field-Programmable Logic and Applications (FPL) - Dresden, Germany
Duration: 30 Aug 202103 Sept 2021

Publication series

NameInternational Conference on Field-Programmable Logic and Applications (FPL): proceedings
ISSN (Print)1946-147X
ISSN (Electronic)1946-1488

Conference

Conference31st International Conference on Field-Programmable Logic and Applications (FPL)
Country/TerritoryGermany
CityDresden
Period30/08/202103/09/2021

Keywords

  • Error-Correction
  • Quantum
  • FPGA
  • Simulation

ASJC Scopus subject areas

  • Hardware and Architecture

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