Architectural synthesis of an image processing algorithm using IRIS

D.W. Trainor, R.F. Woods, J.V. McCanny

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)


Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit.
Original languageEnglish
Title of host publicationIEEE VLSI Signal Processing VIII, IEEE Signal Processing Soc. ed. T Nishitani, K Pahri
Number of pages10
Publication statusPublished - 01 Jan 1995

Bibliographical note

Copyright 2004 Elsevier Science B.V., Amsterdam. All rights reserved.


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