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Architectural synthesis of digital signal processing algorithms using ''IRIS''

Research output: Contribution to conference › Paper

Original languageEnglish
Pages41-55
Number of pages15
Publication statusPublished - Oct 1997
Event1995 Workshop on VLSI Signal Processing - Sakai, Japan
Duration: 01 Oct 1997 → 01 Oct 1997

Conference

Conference1995 Workshop on VLSI Signal Processing
Country/TerritoryJapan
CitySakai
Period01/10/1997 → 01/10/1997

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