BTL: A Framework for Measuring and Modeling Energy in Memory Hierarchies

Ioannis Manousakis; Dimitrios Nikolopoulos

doi:10.1109/SBAC-PAD.2012.38

BTL: A Framework for Measuring and Modeling Energy in Memory Hierarchies

Ioannis Manousakis
, Dimitrios Nikolopoulos

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	Proceedings of the 24th IEEE International Symposium on Computer Architecture and High Performance Computing
Place of Publication	Washington, DC, USA
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	139-146
Number of pages	8
ISBN (Print)	978-0-7695-4907-1
DOIs	https://doi.org/10.1109/SBAC-PAD.2012.38
Publication status	Published - Oct 2012

Access to Document

10.1109/SBAC-PAD.2012.38

Cite this

@inproceedings{217475d5ed754929a15f2175723afd15,

title = "BTL: A Framework for Measuring and Modeling Energy in Memory Hierarchies",

author = "Ioannis Manousakis and Dimitrios Nikolopoulos",

year = "2012",

month = oct,

doi = "10.1109/SBAC-PAD.2012.38",

language = "English",

isbn = "978-0-7695-4907-1",

pages = "139--146",

booktitle = "Proceedings of the 24th IEEE International Symposium on Computer Architecture and High Performance Computing",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

}

BTL: A Framework for Measuring and Modeling Energy in Memory Hierarchies. / Manousakis, Ioannis; Nikolopoulos, Dimitrios.
Proceedings of the 24th IEEE International Symposium on Computer Architecture and High Performance Computing. Washington, DC, USA: Institute of Electrical and Electronics Engineers Inc., 2012. p. 139-146.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - BTL: A Framework for Measuring and Modeling Energy in Memory Hierarchies

AU - Manousakis, Ioannis

AU - Nikolopoulos, Dimitrios

PY - 2012/10

Y1 - 2012/10

U2 - 10.1109/SBAC-PAD.2012.38

DO - 10.1109/SBAC-PAD.2012.38

M3 - Conference contribution

SN - 978-0-7695-4907-1

SP - 139

EP - 146

BT - Proceedings of the 24th IEEE International Symposium on Computer Architecture and High Performance Computing

PB - Institute of Electrical and Electronics Engineers Inc.

CY - Washington, DC, USA

ER -