Abstract
Lattice-based cryptography is a quantum-safe alternative to existing classical asymmetric cryptography, such as RSA and ECC, which may be vulnerable to future attacks in the event of the creation of a viable quantum computer. The efficiency of lattice-based cryptography has improved over recent years, but there has been relatively little investigation into hardware designs of digital signature schemes. In this paper, the first hardware design of the provably secure Ring-LWE digital signature scheme, Ring-TESLA, is presented, targeting a Xilinx Spartan-6 FPGA. The results better compactness of all previous lattice-based digital signature schemes in hardware, and can achieve between 104-785 signatures and 102-776 verifications per second.
| Original language | English |
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| Title of host publication | 2017 IEEE International Symposium on Circuits and Systems (ISCAS). From dreams to innovation: proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Number of pages | 4 |
| ISBN (Electronic) | 9781467368537 |
| ISBN (Print) | 9781509014279 |
| DOIs | |
| Publication status | Published - 25 Sept 2017 |
| Event | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: 28 May 2017 → 31 May 2017 |
Publication series
| Name | Proceedings - IEEE International Symposium on Circuits and Systems |
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| ISSN (Print) | 0271-4310 |
| ISSN (Electronic) | 2379-447X |
Conference
| Conference | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 |
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| Country/Territory | United States |
| City | Baltimore |
| Period | 28/05/2017 → 31/05/2017 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- lattice-based cryptography, digital signatures, postquantum cryptography, hardware security, FPGA
ASJC Scopus subject areas
- Electrical and Electronic Engineering