Comparative analysis of nanoscale MOS device architectures for RF applications

Abhinav Kranti, Alastair Armstrong

Research output: Contribution to journalArticlepeer-review

30 Citations (Scopus)


This paper provides valuable design insights for optimizing device parameters for nanoscale planar and vertical SOI MOSFETs. The suitability of nanoscale non-planar FinFETs and classical planar single and double gate SOI MOSFETs for rf applications is examined via extensive 3D device simulations and detailed interpretation. The origin of higher parasitic capacitance in FinFETs, compared to planar MOSFETs is examined. RF figures of merit for planar and vertical MOS devices are compared, based on layout-area calculations.
Original languageEnglish
Article number005
Pages (from-to)481-491
Number of pages11
JournalSemiconductor Science and Technology
Issue number5
Publication statusPublished - 01 Mar 2007

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Materials Science(all)
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics


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