In this paper, we present a methodology for implementing a complete Digital Signal Processing (DSP) system onto a heterogeneous network including Field Programmable Gate Arrays (FPGAs) automatically. The methodology aims to allow design refinement and real time verification at the system level. The DSP application is constructed in the form of a Data Flow Graph (DFG) which provides an entry point to the methodology. The netlist for parts that are mapped onto the FPGA(s) together with the corresponding software and hardware Application Protocol Interface (API) are also generated. Using a set of case studies, we demonstrate that the design and development time can be significantly reduced using the methodology developed.
|Number of pages||326|
|Publication status||Published - Apr 2005|
|Event||13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005) - Napa, United States|
Duration: 18 Apr 2005 → 20 Apr 2005
|Conference||13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005)|
|Period||18/04/2005 → 20/04/2005|