Cost-Efficient Decimal Adder Design in Quantum-dot Cellular Automata

Weiqiang Liu, Liang Lu, Maire O'Neill, E.E. Swartzlander

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

Applications that cannot tolerate the loss of accuracy that results from binary arithmetic demand hardware decimal arithmetic designs. Binary arithmetic in Quantum-dot cellular automata (QCA) technology has been extensively investigated in recent years. However, only limited attention has been paid to QCA decimal arithmetic. In this paper, two cost-efficient binary-coded decimal (BCD) adders are presented. One is based on the carry flow adder (CFA) using a conventional correction method. The other uses the carry look ahead (CLA) algorithm which is the first QCA CLA decimal adder proposed to date. Compared with previous designs, both decimal adders achieve better performance in terms of latency and overall cost. The proposed CFA-based BCD adder has the smallest area with the least number of cells. The proposed CLA-based BCD adder is the fastest with an increase in speed of over 60% when compared with the previous fastest decimal QCA adder. It also has the lowest overall cost with a reduction of over 90% when compared with the previous most cost-efficient design.
Original languageEnglish
Title of host publication2012 IEEE International Symposium on Circuits and Systems (ISCAS)
Pages1347-1350
DOIs
Publication statusPublished - May 2012
EventIEEE International Symposium on Circuits and Systems - Seoul, Korea, Republic of
Duration: 01 May 201201 May 2012

Conference

ConferenceIEEE International Symposium on Circuits and Systems
CountryKorea, Republic of
CitySeoul
Period01/05/201201/05/2012

Fingerprint Dive into the research topics of 'Cost-Efficient Decimal Adder Design in Quantum-dot Cellular Automata'. Together they form a unique fingerprint.

Cite this