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DDQ-APUF: a highly reliable arbiter PUF using delay difference quantization

  • Xue Mei
  • , Guangyang Zhang
  • , Chongyan Gu
  • , Yao Wang*
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Arbiter PUF (APUF) is one of the most well-known physical unclonable functions (PUFs). However, its hardware implementation has poor reliability on field programmable gate arrays (FPGAs). This paper proposed a highly reliable APUF that uses a multi-bit response delay difference quantization strategy (DDQ-APUF). By adding multiple configurable delay units to the two symmetrical circuits of the conventional APUF, the delay difference between the two symmetrical paths of the APUF can be determined by collecting the output of the APUF with different delay configurations. Moreover, a threshold is used to accommodate the variations in delay differences due to environmental variations. This method greatly improves the reliability of the APUF while achieving a high efficiency. The DDQ-APUF was implemented on Xilinx Artix-7 FPGAs and the experimental results show that the reliability achieves 99.95%.

Original languageEnglish
Title of host publicationProceedings of the 2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2023)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9798350340990
DOIs
Publication statusPublished - 24 Jan 2024
Event8th Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2023 - Tianjin, China
Duration: 13 Dec 202315 Dec 2023

Publication series

NameProceedings of the Asian Hardware Oriented Security and Trust Symposium, (AsianHOST)
PublisherIEEE

Conference

Conference8th Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2023
Country/TerritoryChina
CityTianjin
Period13/12/202315/12/2023

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

  • DDQ-APUF
  • FPGA
  • Identity authentication
  • Security

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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