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Design and analysis of matching circuit architectures for a closest match lookup

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Abstract

    The massive growth in the use of Internet and the development of new real-time applications has put considerable strain on the techniques currently used for the lookup and retrieval of information essential for classification, routing, Quality of Service (QoS) and Internet security. This paper investigates the design and implementation of a number of closest value lookup circuits, suitable for deployment in a range of networking applications. Detailed descriptions of a number of matching circuit architectures are given and the results of hardware implementations for the Altera Stratix II FPGA are discussed and evaluated.

    Original languageEnglish
    Title of host publicationProceedings of the Advanced International Conference on Telecommunications andInternational Conference on Internet and Web Applications and Services, AICT/ICIW'06
    Number of pages1
    Volume2006
    DOIs
    Publication statusPublished - 03 Oct 2006
    EventAdvanced International Conference on Telecommunications andInternational Conference on Internet and Web Applications and Services, AICT/ICIW'06 - Guadelope, French Southern Territories
    Duration: 19 Feb 2006 → 25 Feb 2006

    Conference

    ConferenceAdvanced International Conference on Telecommunications andInternational Conference on Internet and Web Applications and Services, AICT/ICIW'06
    Country/TerritoryFrench Southern Territories
    CityGuadelope
    Period19/02/2006 → 25/02/2006

    ASJC Scopus subject areas

    • General Engineering

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