DESIGN OF A HIGHLY PIPELINED 2ND-ORDER IIR FILTER CHIP

OC MCNALLY, JV MCCANNY, RF WOODS

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	VLSI 91
Editors	A Halaas, PB Denyer
Place of Publication	AMSTERDAM
Publisher	Elsevier B.V.
Pages	19-28
Number of pages	10
ISBN (Print)	0-444-89019-X
Publication status	Published - 1992
Event	IFIP TC10/WG10.5 International Conference on Very Large Scale Integration - EDINBURGH, United Kingdom Duration: 20 Aug 1991 → 22 Aug 1991

Name	IFIP TRANSACTIONS A-COMPUTER SCIENCE AND TECHNOLOGY
Publisher	ELSEVIER SCIENCE PUBL B V
Volume	1
ISSN (Print)	0926-5473

Conference	IFIP TC10/WG10.5 International Conference on Very Large Scale Integration
Country/Territory	United Kingdom
City	EDINBURGH
Period	20/08/1991 → 22/08/1991

Cite this

@inproceedings{40b1ac7e57a449a8879ca6226156c5d8,

title = "DESIGN OF A HIGHLY PIPELINED 2ND-ORDER IIR FILTER CHIP",

author = "OC MCNALLY and JV MCCANNY and RF WOODS",

year = "1992",

language = "English",

isbn = "0-444-89019-X",

series = "IFIP TRANSACTIONS A-COMPUTER SCIENCE AND TECHNOLOGY",

publisher = "Elsevier B.V.",

pages = "19--28",

editor = "A Halaas and PB Denyer",

booktitle = "VLSI 91",

address = "Netherlands",

note = "IFIP TC10/WG10.5 International Conference on Very Large Scale Integration ; Conference date: 20-08-1991 Through 22-08-1991",

}

TY - GEN

T1 - DESIGN OF A HIGHLY PIPELINED 2ND-ORDER IIR FILTER CHIP

AU - MCNALLY, OC

AU - MCCANNY, JV

AU - WOODS, RF

PY - 1992

Y1 - 1992

M3 - Conference contribution

SN - 0-444-89019-X

T3 - IFIP TRANSACTIONS A-COMPUTER SCIENCE AND TECHNOLOGY

SP - 19

EP - 28

BT - VLSI 91

A2 - Halaas, A

A2 - Denyer, PB

PB - Elsevier B.V.

CY - AMSTERDAM

T2 - IFIP TC10/WG10.5 International Conference on Very Large Scale Integration

Y2 - 20 August 1991 through 22 August 1991

ER -