Design of latch-based C-element

Julian Murphy

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)


The C-element logic gate is a key component for constructing asynchronous control in silicon integrated circuits. The purpose of this reported work is to introduce a new speed-independent C-element design, which is synthesised by the asynchronous Petrify design tool to ensure it is composed of sequential digital latches rather than complex gates. The benefits are that it guarantees correct speed-independent operation, together with easy integration in modern design flows and processes. It is compared to an equivalent speed-independent complex gate C-element design generated by Petrify in a 130 nm semiconductor process.
Original languageEnglish
Pages (from-to)1190-1191
Number of pages2
JournalIET Electronic Letters
Issue number19
Publication statusPublished - Sept 2012


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