Abstract
To date, the basic idea for implementing stream ciphers has been confined to individual standalone designs. In this paper, we introduce the notion of integrated implementation of multiple stream ciphers within a single architecture, where the goal is to achieve area and throughput efficiency by exploiting the structural similarities of the ciphers at an algorithmic level. We present two case studies to support our idea. First, we propose the merger of SNOW 3G and ZUC stream ciphers, which constitute a part of the 3GPP LTE-Advanced security suite. We propose HiPAcc-LTE, a high performance integrated design that combines the two ciphers in hardware, based on their structural similarities. The integrated architecture reduces the area overhead significantly compared to two distinct cores, and also provides almost double throughput in terms of keystream generation, compared with the state-of-the-art implementations of the individual ciphers. As our second case study, we present IntAcc-RCHC, an integrated accelerator for the stream ciphers RC4 and HC-128. We show that the integrated accelerator achieves a slight reduction in area without any loss in throughput compared to our standalone implementations. We also achieve at least 1. 5 times better throughput compared to general purpose processors. Long term vision of this hardware integration approach for cryptographic primitives is to build a flexible core supporting multiple designs having similar algorithmic structures.
Original language | English |
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Pages (from-to) | 19-47 |
Number of pages | 29 |
Journal | Cryptography and Communications |
Volume | 5 |
Issue number | 1 |
DOIs | |
Publication status | Published - 01 Jan 2013 |
Keywords
- 3GPP LTE-Advanced
- Area efficiency
- ASIC
- HC-128
- High throughput
- Integrated accelerator
- RC4
- SNOW 3G
- Stream ciphers
- ZUC
ASJC Scopus subject areas
- Computer Networks and Communications
- Computational Theory and Mathematics
- Applied Mathematics