Exploration of hardware architectures for string matching algorithms in network intrusion detection systems

Muhammad Rashid; Malik Imran; Atif Raza Jafri

doi:10.1145/3406601.3406608

Exploration of hardware architectures for string matching algorithms in network intrusion detection systems

Muhammad Rashid, Malik Imran, Atif Raza Jafri

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

An intrusion detection system monitors and analyzes all the incoming packets, on a given network, to detect any corresponding vulnerabilities and intrusions. It consists of four major modules: packet capturing, packet decoding, packet preprocessing and string/pattern matching. Among these, the string matching is computationally the most intensive part and a number of hardware architectures/designs have already been proposed to accelerate its performance. Consequently, an exploration of existing hardware architectures for string matching algorithms is critical. This paper identifies the most frequently used string matching algorithms and techniques, utilized for the hardware implementation. Subsequently, an exploration of various hardware architectures is provided for the identified algorithms and techniques. Finally, the implementation details of explored architectures are discussed in terms of the used device, consumed hardware resources, operational clock frequency and throughput.

Original language	English
Title of host publication	IAIT '20: Proceedings of the 11th International Conference on Advances in Information Technology
Publisher	Association for Computing Machinery
Pages	1-7
ISBN (Electronic)	9781450377591
DOIs	https://doi.org/10.1145/3406601.3406608
Publication status	Published - 03 Jul 2020
Externally published	Yes
Event	11th International Conference on Advances in Information Technology, IAIT 2020 - Bangkok, Thailand Duration: 01 Jul 2020 → 03 Jul 2020

Publication series

Name	ACM International Conference Proceeding Series

Conference

Conference	11th International Conference on Advances in Information Technology, IAIT 2020
Country/Territory	Thailand
City	Bangkok
Period	01/07/2020 → 03/07/2020

Bibliographical note

Publisher Copyright:
© 2020 ACM.

Keywords

hardware implementations
Network intrusion detection system
string matching algorithms
throughput

ASJC Scopus subject areas

Software
Human-Computer Interaction
Computer Vision and Pattern Recognition
Computer Networks and Communications

Access to Document

10.1145/3406601.3406608Licence: Unspecified

Cite this

Rashid, M., Imran, M., & Jafri, A. R. (2020). Exploration of hardware architectures for string matching algorithms in network intrusion detection systems. In IAIT '20: Proceedings of the 11th International Conference on Advances in Information Technology (pp. 1-7). Article 3 (ACM International Conference Proceeding Series). Association for Computing Machinery. https://doi.org/10.1145/3406601.3406608

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title = "Exploration of hardware architectures for string matching algorithms in network intrusion detection systems",

abstract = "An intrusion detection system monitors and analyzes all the incoming packets, on a given network, to detect any corresponding vulnerabilities and intrusions. It consists of four major modules: packet capturing, packet decoding, packet preprocessing and string/pattern matching. Among these, the string matching is computationally the most intensive part and a number of hardware architectures/designs have already been proposed to accelerate its performance. Consequently, an exploration of existing hardware architectures for string matching algorithms is critical. This paper identifies the most frequently used string matching algorithms and techniques, utilized for the hardware implementation. Subsequently, an exploration of various hardware architectures is provided for the identified algorithms and techniques. Finally, the implementation details of explored architectures are discussed in terms of the used device, consumed hardware resources, operational clock frequency and throughput.",

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author = "Muhammad Rashid and Malik Imran and Jafri, {Atif Raza}",

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year = "2020",

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doi = "10.1145/3406601.3406608",

language = "English",

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Rashid, M, Imran, M & Jafri, AR 2020, Exploration of hardware architectures for string matching algorithms in network intrusion detection systems. in IAIT '20: Proceedings of the 11th International Conference on Advances in Information Technology., 3, ACM International Conference Proceeding Series, Association for Computing Machinery, pp. 1-7, 11th International Conference on Advances in Information Technology, IAIT 2020, Bangkok, Thailand, 01/07/2020. https://doi.org/10.1145/3406601.3406608

Exploration of hardware architectures for string matching algorithms in network intrusion detection systems. / Rashid, Muhammad; Imran, Malik; Jafri, Atif Raza.
IAIT '20: Proceedings of the 11th International Conference on Advances in Information Technology. Association for Computing Machinery, 2020. p. 1-7 3 (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Exploration of hardware architectures for string matching algorithms in network intrusion detection systems

AU - Rashid, Muhammad

AU - Imran, Malik

AU - Jafri, Atif Raza

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N2 - An intrusion detection system monitors and analyzes all the incoming packets, on a given network, to detect any corresponding vulnerabilities and intrusions. It consists of four major modules: packet capturing, packet decoding, packet preprocessing and string/pattern matching. Among these, the string matching is computationally the most intensive part and a number of hardware architectures/designs have already been proposed to accelerate its performance. Consequently, an exploration of existing hardware architectures for string matching algorithms is critical. This paper identifies the most frequently used string matching algorithms and techniques, utilized for the hardware implementation. Subsequently, an exploration of various hardware architectures is provided for the identified algorithms and techniques. Finally, the implementation details of explored architectures are discussed in terms of the used device, consumed hardware resources, operational clock frequency and throughput.

AB - An intrusion detection system monitors and analyzes all the incoming packets, on a given network, to detect any corresponding vulnerabilities and intrusions. It consists of four major modules: packet capturing, packet decoding, packet preprocessing and string/pattern matching. Among these, the string matching is computationally the most intensive part and a number of hardware architectures/designs have already been proposed to accelerate its performance. Consequently, an exploration of existing hardware architectures for string matching algorithms is critical. This paper identifies the most frequently used string matching algorithms and techniques, utilized for the hardware implementation. Subsequently, an exploration of various hardware architectures is provided for the identified algorithms and techniques. Finally, the implementation details of explored architectures are discussed in terms of the used device, consumed hardware resources, operational clock frequency and throughput.

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KW - string matching algorithms

KW - throughput

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M3 - Conference contribution

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T3 - ACM International Conference Proceeding Series

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Rashid M, Imran M, Jafri AR. Exploration of hardware architectures for string matching algorithms in network intrusion detection systems. In IAIT '20: Proceedings of the 11th International Conference on Advances in Information Technology. Association for Computing Machinery. 2020. p. 1-7. 3. (ACM International Conference Proceeding Series). doi: 10.1145/3406601.3406608

Exploration of hardware architectures for string matching algorithms in network intrusion detection systems

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

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