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Abstract
The increasing scale of Multiple-Input Multiple- Output (MIMO) topologies employed in forthcoming wireless communications standards presents a substantial implementation challenge to designers of embedded baseband signal processing architectures for MIMO transceivers. Specifically the increased scale of such systems has a substantial impact on the perfor- mance/cost balance of detection algorithms for these systems. Whilst in small-scale systems Sphere Decoding (SD) algorithms offer the best quasi-ML performance/cost balance, in larger systems heuristic detectors, such Tabu-Search (TS) detectors are superior. This paper addresses a dearth of research in architectures for TS-based MIMO detection, presenting the first known realisations of TS detectors for 4 × 4 and 10 × 10 MIMO systems. To the best of the authors’ knowledge, these are the largest single-chip detectors on record.
Original language | English |
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Title of host publication | Proceedings of 2014 IEEE Workshop on Signal Processing Systems (SiPS) |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 1-6 |
Number of pages | 6 |
ISBN (Print) | 978-1-4799-6588-5 |
DOIs | |
Publication status | Published - Oct 2014 |
Event | 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014 - Belfast, United Kingdom Duration: 20 Oct 2014 → 22 Oct 2014 |
Conference
Conference | 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014 |
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Country/Territory | United Kingdom |
City | Belfast |
Period | 20/10/2014 → 22/10/2014 |
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