@inproceedings{689e5fd0ca1f47c7be42cb1763b05248,
title = "FPGA soft-core processors, compiler and hardware optimizations validated using HOG",
abstract = "There is demand for an easily programmable, high performance image processing platform based on FPGAs. In previous work, a novel, high performance processor-IPPro was developed and a Histogram of Orientated Gradients (HOG) algorithm study undertaken on a Xilinx Zynq platform. Here, we identify and explore a number of mapping strategies to improve processing efficiency for soft-cores and a number of options for creation of a division coprocessor. This is demonstrated for the revised high definition HOG implementation on a Zynq platform, resulting in a performance of 328 fps which represents a 146% speed improvement over the original realization and a tenfold reduction in energy.",
keywords = "FPGA, HOG, Image processing, Memory",
author = "Colm Kelly and Siddiqui, {Fahad Manzoor} and Burak Bardak and Yun Wu and Roger Woods and Karren Rafferty",
year = "2016",
month = mar,
day = "13",
doi = "10.1007/978-3-319-30481-6_7",
language = "English",
isbn = "9783319304809",
volume = "9625",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer-Verlag",
pages = "78--90",
booktitle = "Applied Reconfigurable Computing - 12th International Symposium, ARC 2016, Proceedings",
note = "12th International Symposium on Applied Reconfigurable Computing, ARC 2016 ; Conference date: 22-03-2016 Through 24-03-2016",
}