Graph Coordination for Compact Representation of Regular Dataflow Structures

John McAllister, Michael Davis

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Dataflow modelling languages are highly effective for creating efficient implementations of signal processing operations on embedded and edge computing devices. However, they lack general constructs to compactly describe regular scalable structures, as required by modern large-scale signal processing and machine learning operations. This paper describes a framework to do that. It extends the Processing Graph Method coordination language with a switch construct which allows scalable, regular connectivity to be compactly expressed for compile-time analysis and elaboration. It shows how switches can merge, split and permute groups of connections and can express recognised topological structures - such as chains, rings, butterflys and multicast operations - despite its general nature. It is applied to the description of large-scale FFT and Artificial Neural Network (ANN) operators.

Original languageEnglish
Title of host publication2020 IEEE Workshop on Signal Processing Systems (SiPS 2020): Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages6
ISBN (Electronic)9781728180991
DOIs
Publication statusPublished - 23 Sep 2020
Event34th IEEE Workshop on Signal Processing Systems, SiPS 2020 - Virtual, Coimbra, Portugal
Duration: 20 Oct 202022 Oct 2020

Publication series

NameIEEE Workshop on Signal Processing Systems (SiPS): Design and Implementation: Proceedings
Volume2020-October
ISSN (Print)1520-6130

Conference

Conference34th IEEE Workshop on Signal Processing Systems, SiPS 2020
Country/TerritoryPortugal
CityVirtual, Coimbra
Period20/10/202022/10/2020

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.

Keywords

  • Dataflow
  • Graph Coordination

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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