Hardware design and optimal ADC resolution for massive MIMO systems

Daniel Verenzuela, Emil Björnson, Michail Matthaiou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work focuses on the hardware design for the efficient operation of Massive multiple-input multiple-output (MIMO) systems. A closed-form uplink achievable data rate expression is derived considering imperfect channel state information (CSI) and hardware impairments. We formulate an optimization problem to maximize the sum data rate subject to a constraint on the total power consumption. A general power consumption model accounting for the level of hardware impairments is utilized. The optimization variables are the number of base station (BS) antennas and the level of impairments per BS antenna. The resolution of the analog-to-digital converter (ADC) is a primary source of such impairments. The results show the trade-off between the number of BS antennas and the level of hardware impairments, which is important for practical hardware design. Moreover, the maximum power consumption can be tuned to achieve maximum energy efficiency (EE). Numerical results suggest that the optimal level of hardware impairments yields ADCs of 4 to 5 quantization bits.
Original languageEnglish
Title of host publicationIEEE Sensor Array and Multichannel Signal Processing Workshop (SAM)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
ISBN (Electronic)978-1-5090-2103-1
Publication statusPublished - 19 Sep 2016

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    Verenzuela, D., Björnson, E., & Matthaiou, M. (2016). Hardware design and optimal ADC resolution for massive MIMO systems. In IEEE Sensor Array and Multichannel Signal Processing Workshop (SAM) Institute of Electrical and Electronics Engineers (IEEE). http://www.redes.unb.br/lasp/files/events/SAM2016/resumos/1570257380.pdf