There is an increasing demand in real-time imagery applications such as rapid response to disaster rescue and security screening to name a few. The throughput of a radar imaging system is mainly controlled by two parameters; data acquisition time and signal processing time. To minimize the data acquisition time, various methods are being tried and tested by researchers worldwide. Among them is the computational imaging (CI) technique, which relies on using coded apertures to encode the radar back-scattered measurements onto a set of spatio-temporarily incoherent radiation patterns. Such a CI-based imaging approach eliminates the requirement for a raster scan and can substantially simplify the physical hardware architecture. Equally important is the processing time needed to retrieve the scene information from the coded back-scattered measurements. In CI, the simplification in the hardware layer comes at the cost of increased complexity in the signal processing layer due to the indirect mapping and compression of the scene information through the spatio-temporally incoherent transfer function of the coded apertures. To address this particular challenge, this paper presents a hardware-based solution for CI signal processing using a Field Programmable Gate Array (an Xilinx Virtex-7 (XC7VX485T) FPGA chip) architecture. In particular, the proposed method consists of calculating the CI sensing matrix using the FPGA chip and storing it on the FPGA platform for image reconstruction. For the adjoint operation, the calculated sensing matrix is applied on the measured back-scattered waves from the target object. We demonstrate that the FPGA based calculation can reach 21.9 times faster speed than conventional brute-force solutions.
|Number of pages||18|
|Journal||Progress in Electromagnetic Research B|
|Publication status||Published - 08 Jan 2021|
- parallel computing
- compressive sensing