Methods are presented for the rapid design of DSP ASICs based on the use of hierarchical VHDL libraries. These are portable across many silicon foundries and allow complex DSP silicon systems to be developed in a fraction of the time normally required. Resulting designs are highly competitive with ones created using conventional methods. The approach is illustrated by its application to ADPCM codec and DCT cores.
|Number of pages||4|
|Journal||ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings|
|Publication status||Published - 01 Jan 1997|
Bibliographical noteCopyright 2004 Elsevier Science B.V., Amsterdam. All rights reserved.
McCanny, J., Ridge, D., Hu, Y., & Hunter, J. (1997). Hierarchical VHDL libraries for DSP ASIC design. ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, 1, 675-678. https://doi.org/10.1109/ICASSP.1997.599858