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Abstract
Pre-processing (PP) of received symbol vector and channel matrices is an essential pre-requisite operation for Sphere Decoder (SD)-based detection of Multiple-Input Multiple-Output (MIMO) wireless systems. PP is a highly complex operation, but relative to the total SD workload it represents a relatively small fraction of the overall computational cost of detecting an OFDM MIMO frame in standards such as 802.11n. Despite this, real-time PP architectures are highly inefficient, dominating the resource cost of real-time SD architectures. This paper resolves this issue. By reorganising the ordering and QR decomposition sub operations of PP, we describe a Field Programmable Gate Array (FPGA)-based PP architecture for the Fixed Complexity Sphere Decoder (FSD) applied to 4 × 4 802.11n MIMO which reduces resource cost by 50% as compared to state-of-the-art solutions whilst maintaining real-time performance.
Original language | English |
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Pages | 1250 - 1253 |
Number of pages | 4 |
DOIs | |
Publication status | Published - Dec 2013 |
Event | Global Conference on Signal and Information Processing (GlobalSIP), 2013 IEEE - Austin, United States Duration: 03 Dec 2013 → 05 Dec 2013 |
Conference
Conference | Global Conference on Signal and Information Processing (GlobalSIP), 2013 IEEE |
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Country/Territory | United States |
City | Austin |
Period | 03/12/2013 → 05/12/2013 |
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Dive into the research topics of 'High Performance Real-time Pre-Processing for Fixed-Complexity Sphere Decoder'. Together they form a unique fingerprint.Projects
- 1 Finished
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R1128CSC: Softcore Streaming Processors for FPGA DSP
McAllister, J. (PI) & Woods, R. (CoI)
01/08/2009 → 28/02/2014
Project: Research