Abstract
In theory, the speed of quantum computers is much faster than classical computers, which poses a threat to the Public Key Cryptography (PKC) that are currently in use. Post Quantum Cryptography (PQC) is a class of cryptography based on complex mathematical problems that are difficult to be attacked by quantum computers. The Supersingular Isogeny Key Encapsulation (SIKE) protocol is one of candidate algorithms for the US National Institute of Standards and Technology (NIST) PQC standardization process and survived to the Round 3. In this paper, we reconstruct the systolic array based Montgomery multiplier architecture for SIKE, using a three-stage pipeline that results in frequency improvement of 21.4%. The proposed multiplier consumed fewer DSP resources than the state-of-the-art SIKE designs and has a speed increase up to 12.7%.
Original language | English |
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Title of host publication | Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS 2021 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Number of pages | 5 |
ISBN (Electronic) | 9781728192000 |
ISBN (Print) | 9781728192017 |
DOIs | |
Publication status | Published - 27 Apr 2021 |
Event | 53rd IEEE International Symposium on Circuits and Systems 2021 - Daegu, Korea, Republic of Duration: 22 May 2021 → 28 May 2021 https://doi.org/10.1109/ISCAS51556.2021 |
Publication series
Name | IEEE International Symposium on Circuits and Systems: proceedings |
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ISSN (Print) | 0271-4310 |
ISSN (Electronic) | 2158-1525 |
Conference
Conference | 53rd IEEE International Symposium on Circuits and Systems 2021 |
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Abbreviated title | ISCAS 2021 |
Country/Territory | Korea, Republic of |
City | Daegu |
Period | 22/05/2021 → 28/05/2021 |
Internet address |
Keywords
- FPGA
- Modular multiplication
- Post-quantum cryptography
- SIKE
ASJC Scopus subject areas
- Electrical and Electronic Engineering