Image processing chip for small object detection

E. Leriguer, D. Ridge, R. Woods, J. McCanny

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

A new, front-end image processing chip is presented for real-time small object detection. It has been implemented using a 0.6 µ, 3.3 V CMOS technology and operates on 10-bit input data at 54 megasamples per second. It occupies an area of 12.9 mm×13.6 mm (including pads), dissipates 1.5 W, has 92 I/O pins and is to be housed in a 160-pin ceramic quarter flat-pack. It performs both one- and two-dimensional FIR filtering and a multilayer perceptron (MLP) neural network function using a reconfigurable array of 21 multiplication-accumulation cells which corresponds to a window size of 7×3. The chip can cope with images of 2047 pixels per line and can be cascaded to cope with larger window sizes. The chip performs two billion fixed point multiplications and additions per second.
Original languageEnglish
Pages (from-to)49-54
Number of pages6
JournalIEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS
Volume146
Issue number2
DOIs
Publication statusPublished - 01 Jan 1999

Bibliographical note

Copyright 2007 Elsevier B.V., All rights reserved.

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Image processing chip for small object detection'. Together they form a unique fingerprint.

  • Cite this