Introduction to residue number system: structure and teaching methodology

The emergence of embedded systems with severe power restrictions together with technology developments that require fault-tolerant approaches spurred interest in the residue number system (RNS). Owing to its unique characteristics, which lead to fast and low-power arithmetic circuits, RNS has become an interesting option to design embedded systems for nowadays high-performance applications. However, to unlock the full potential of RNS for designing efficient embedded systems, the system’s architect should be aware of the structure and latest advances on RNS circuits and systems, including residue arithmetic, algorithms, and hardware design. RNS has a multi-disciplinary nature supported on mathematical formulation, digital design, and computer architecture. This chapter briefly reviews the most up to date hardware structures of RNS components, and introduces the most efficient designs for each part to ease the designer’s work. Moreover, a teaching method to learn about RNS-based systems, usable both for class lecturing and individual research, is presented. All aspects of RNS, namely moduli set selection, residue-based hardware component design, including forward and reverse converters, and modulo arithmetic circuits are considered in a comprehensive teaching approach. This teaching methodology can lead to a deeper understanding of RNS, and consequently open the gates to perform more effective and applicable investigation on RNS-based embedded systems.