Inverse Class-E Amplifier With Transmission-Line Harmonic Suppression

Mury Thian; V.F. Fusco

doi:10.1109/TCSI.2007.899617

Inverse Class-E Amplifier With Transmission-Line Harmonic Suppression

Mury Thian, V.F. Fusco

Research output: Contribution to journal › Article

52 Citations (Scopus)

Abstract

This paper reports on the design methodology and experimental characterization of the inverse Class-E power amplifier. A demonstration amplifier with excellent second and third harmonic-suppression levels has been designed, constructed, and measured. The circuit fabricated using a 1.2-min gate-width GaAs MESFET is shown to be able to deliver 22-dBm output power at 2.3 GHz. The amplifier achieves a peak power-added efficiency of 64 % and drain efficiency of 69 %, and exhibits 11.6 dB power gain when operated from a 3-V supply voltage. Comparisons of simulated and measured results are given with good agreement between them being obtained. Experimental results are presented for the amplifier's response to Gaussian minimum shift keying modulation, where a peak error vector modulation value of 0.6% is measured.

Original language	English
Pages (from-to)	1555-1561
Number of pages	7
Journal	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume	54
Issue number	7
DOIs	https://doi.org/10.1109/TCSI.2007.899617
Publication status	Published - Jul 2007

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Thian, M., & Fusco, V. F. (2007). Inverse Class-E Amplifier With Transmission-Line Harmonic Suppression. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 54(7), 1555-1561. https://doi.org/10.1109/TCSI.2007.899617

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