Late breaking results: automated design of device fingerprinting circuits for FPGAs

Designing device fingerprinting circuits for FPGAs is challenging due to limited knowledge about device layout and manufacturing
induced biases, often resulting in poor uniqueness and biased responses. Existing mitigation techniques are typically device specific, time consuming, and difficult to generalize. We propose an automated EDA tool, that analyses the target FPGA to optimize circuit layout to maximise extracted entropy and mitigate systematic bias. Across 100 device testbed, the tool outperformed comparable manual designs, achieving near ideal uniqueness and bias. These results demonstrate that automated device aware design can reliably estimate and approach the best achievable performance on a given FPGA.