Abstract
Lattice based cryptography (LBC) is one of the most promising post-quantum cryptographic candidates. Ringlearning with errors (R-LWE) is an encryption scheme of LBC. In this paper, a lightweight hardware implementation is presented including key generation, encryption, and decryption. The RLWE encryption scheme consists of a Gaussian sampler and polynomial multiplication. This paper uses cumulative distribution table (CDT) as the Gaussian sampler and schoolbook approach for the polynomial multiplication. The purpose of this
architecture is to achieve small area consumption with high frequency. The hardware implementation results on the Xilinx Kintex-7 FPGA shows that the design consumes 808 slices and the frequency can be up to 288.35MHz.
architecture is to achieve small area consumption with high frequency. The hardware implementation results on the Xilinx Kintex-7 FPGA shows that the design consumes 808 slices and the frequency can be up to 288.35MHz.
| Original language | English |
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| Title of host publication | IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) 2018: Proceedings |
| Publisher | IEEE |
| Number of pages | 4 |
| Publication status | Published - 2018 |
| Event | IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) - Shangri-La Hotel, Chengdu, China Duration: 26 Oct 2018 → 30 Oct 2018 http://apccas.com/ |
Conference
| Conference | IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) |
|---|---|
| Country/Territory | China |
| City | Chengdu |
| Period | 26/10/2018 → 30/10/2018 |
| Internet address |
Keywords
- lattice-based cryptography
- Ring-learning with errors
- FPGA