Low-cost configurable ring oscillator PUF with improved uniqueness

Yijun Cui; Chenghua Wang; Weiqiang Liu; Yifei Yu; Maire O'Neill; Fabrizio Lombardi

doi:10.1109/ISCAS.2016.7527301

Low-cost configurable ring oscillator PUF with improved uniqueness

Yijun Cui
, Chenghua Wang
, Weiqiang Liu
, Yifei Yu
, Maire O'Neill
, Fabrizio Lombardi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

62 Citations (Scopus)

Abstract

The physical unclonable function (PUF) produces die-unique responses and is regarded as an emerging security primitive that can be used for authentication of devices. The complexity of a conventional PUF design based on a ring oscillator (RO) is rather high, so limiting its use in many applications. The configurable ring oscillator (CRO) PUF has been advocated as a possible solution to this issue. In this paper, a low hardware complexity CRO PUF design with an enhanced capability to generate a large number of bit responses is proposed; only an inverter and a multiplexer are used in each delay unit. The responses are generated by considering the variation due to fabrication of the logic gates and wires in the CROs. A novel comparison strategy is proposed for the generation of the responses. The proposed PUF design is implemented on Xilinx Spartan-6 FPGAs. These results show that the proposed CRO PUF design has good uniqueness; moreover, it is also robust in its operation for the temperature range of -25°C∼85°C.

Original language	English
Title of host publication	Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	558-561
Number of pages	4
ISBN (Electronic)	9781479953400
DOIs	https://doi.org/10.1109/ISCAS.2016.7527301
Publication status	Published - 11 Aug 2016
Event	2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada Duration: 22 May 2016 → 25 May 2016

Conference

Conference	2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
Country/Territory	Canada
City	Montreal
Period	22/05/2016 → 25/05/2016

Keywords

configurable ring oscillator
FPGA
PUF

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2016.7527301Licence: Unspecified

Cite this

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title = "Low-cost configurable ring oscillator PUF with improved uniqueness",

abstract = "The physical unclonable function (PUF) produces die-unique responses and is regarded as an emerging security primitive that can be used for authentication of devices. The complexity of a conventional PUF design based on a ring oscillator (RO) is rather high, so limiting its use in many applications. The configurable ring oscillator (CRO) PUF has been advocated as a possible solution to this issue. In this paper, a low hardware complexity CRO PUF design with an enhanced capability to generate a large number of bit responses is proposed; only an inverter and a multiplexer are used in each delay unit. The responses are generated by considering the variation due to fabrication of the logic gates and wires in the CROs. A novel comparison strategy is proposed for the generation of the responses. The proposed PUF design is implemented on Xilinx Spartan-6 FPGAs. These results show that the proposed CRO PUF design has good uniqueness; moreover, it is also robust in its operation for the temperature range of -25°C∼85°C.",

keywords = "configurable ring oscillator, FPGA, PUF",

author = "Yijun Cui and Chenghua Wang and Weiqiang Liu and Yifei Yu and Maire O'Neill and Fabrizio Lombardi",

year = "2016",

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doi = "10.1109/ISCAS.2016.7527301",

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booktitle = "Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS)",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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note = "2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 ; Conference date: 22-05-2016 Through 25-05-2016",

}

Cui, Y, Wang, C, Liu, W, Yu, Y, O'Neill, M & Lombardi, F 2016, Low-cost configurable ring oscillator PUF with improved uniqueness. in Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS)., 7527301, Institute of Electrical and Electronics Engineers Inc., pp. 558-561, 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada, 22/05/2016. https://doi.org/10.1109/ISCAS.2016.7527301

Low-cost configurable ring oscillator PUF with improved uniqueness. / Cui, Yijun; Wang, Chenghua; Liu, Weiqiang et al.
Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS). Institute of Electrical and Electronics Engineers Inc., 2016. p. 558-561 7527301.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Cui, Yijun

AU - Wang, Chenghua

AU - Liu, Weiqiang

AU - Yu, Yifei

AU - O'Neill, Maire

AU - Lombardi, Fabrizio

PY - 2016/8/11

Y1 - 2016/8/11

N2 - The physical unclonable function (PUF) produces die-unique responses and is regarded as an emerging security primitive that can be used for authentication of devices. The complexity of a conventional PUF design based on a ring oscillator (RO) is rather high, so limiting its use in many applications. The configurable ring oscillator (CRO) PUF has been advocated as a possible solution to this issue. In this paper, a low hardware complexity CRO PUF design with an enhanced capability to generate a large number of bit responses is proposed; only an inverter and a multiplexer are used in each delay unit. The responses are generated by considering the variation due to fabrication of the logic gates and wires in the CROs. A novel comparison strategy is proposed for the generation of the responses. The proposed PUF design is implemented on Xilinx Spartan-6 FPGAs. These results show that the proposed CRO PUF design has good uniqueness; moreover, it is also robust in its operation for the temperature range of -25°C∼85°C.

AB - The physical unclonable function (PUF) produces die-unique responses and is regarded as an emerging security primitive that can be used for authentication of devices. The complexity of a conventional PUF design based on a ring oscillator (RO) is rather high, so limiting its use in many applications. The configurable ring oscillator (CRO) PUF has been advocated as a possible solution to this issue. In this paper, a low hardware complexity CRO PUF design with an enhanced capability to generate a large number of bit responses is proposed; only an inverter and a multiplexer are used in each delay unit. The responses are generated by considering the variation due to fabrication of the logic gates and wires in the CROs. A novel comparison strategy is proposed for the generation of the responses. The proposed PUF design is implemented on Xilinx Spartan-6 FPGAs. These results show that the proposed CRO PUF design has good uniqueness; moreover, it is also robust in its operation for the temperature range of -25°C∼85°C.

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BT - Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS)

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ER -

Low-cost configurable ring oscillator PUF with improved uniqueness

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Keywords

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