Mitigating the Impact of Faults in Unreliable Memories for Error-Resilient Applications

Shrikanth Ganapathy, Georgios Karakonstantis, Adam Teman, Andreas Burg

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)
313 Downloads (Pure)

Abstract

Inherently error-resilient applications in areas such as signal processing, machine learning and data analytics provide opportunities for relaxing reliability requirements, and thereby reducing the overhead incurred by conventional error correction schemes. In this paper, we exploit the tolerable imprecision of such applications by designing an energy-efficient fault-mitigation scheme for unreliable data memories to meet target yield. The proposed approach uses a bit-shuffling mechanism to isolate faults into bit locations with lower significance. This skews the bit-error distribution towards the low order bits, substantially limiting the output error magnitude. By controlling the granularity of the shuffling, the proposed technique enables trading-off quality for power, area, and timing overhead. Compared to error-correction codes, this can reduce the overhead by as much as 83% in read power, 77% in read access time, and 89% in area, when applied to various data mining applications in 28nm process technology.

Original languageEnglish
Title of host publicationProceedings of the 52nd Annual Design Automation Conference
PublisherACM
Number of pages6
ISBN (Print)9781450335201
DOIs
Publication statusPublished - 2015
EventDesign Automation Conference (DAC 2015) - Ca, San Francisco, United States
Duration: 07 Jun 201511 Jun 2015

Conference

ConferenceDesign Automation Conference (DAC 2015)
CountryUnited States
CitySan Francisco
Period07/06/201511/06/2015

Keywords

  • Approximate Computing
  • Bit-shuffling
  • Error Correction
  • Error-resilient Applications
  • Priority-ECC
  • Significance-driven computing
  • Unreliable Memory

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modelling and Simulation

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  • Cite this

    Ganapathy, S., Karakonstantis, G., Teman, A., & Burg, A. (2015). Mitigating the Impact of Faults in Unreliable Memories for Error-Resilient Applications. In Proceedings of the 52nd Annual Design Automation Conference [102] ACM. https://doi.org/10.1145/2744769.2744871