Multi-standard sub-pixel interpolation architecture for video motion estimation

Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

6 Citations (Scopus)


A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. ©2008 IEEE.
Original languageEnglish
Title of host publication2008 IEEE International SOC Conference, SOCC
Number of pages4
Publication statusPublished - 01 Jan 2008
EventIEEE International SoC Conference - Newport Beach, United States
Duration: 01 Sep 200801 Sep 2008


ConferenceIEEE International SoC Conference
Country/TerritoryUnited States
CityNewport Beach

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering


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