Multi-standard sub-pixel interpolation architecture for video motion estimation

L. Lu; J.V. McCanny; S. Sezer

doi:10.1109/SOCC.2008.4641517

Multi-standard sub-pixel interpolation architecture for video motion estimation

L. Lu, J.V. McCanny, S. Sezer

Research output: Chapter in Book/Report/Conference proceeding › Other chapter contribution

6 Citations (Scopus)

Abstract

A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. ©2008 IEEE.

Original language	English
Title of host publication	2008 IEEE International SOC Conference, SOCC
Pages	229-232
Number of pages	4
DOIs	https://doi.org/10.1109/SOCC.2008.4641517
Publication status	Published - 01 Jan 2008
Event	IEEE International SoC Conference - Newport Beach, United States Duration: 01 Sep 2008 → 01 Sep 2008

Conference

Conference	IEEE International SoC Conference
Country/Territory	United States
City	Newport Beach
Period	01/09/2008 → 01/09/2008

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/SOCC.2008.4641517

Cite this

@inbook{722f0d563e4d4ba6898b9c88a7843187,

title = "Multi-standard sub-pixel interpolation architecture for video motion estimation",

abstract = "A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. {\textcopyright}2008 IEEE.",

author = "L. Lu and J.V. McCanny and S. Sezer",

year = "2008",

month = jan,

day = "1",

doi = "10.1109/SOCC.2008.4641517",

language = "English",

pages = "229--232",

booktitle = "2008 IEEE International SOC Conference, SOCC",

note = "IEEE International SoC Conference ; Conference date: 01-09-2008 Through 01-09-2008",

}

TY - CHAP

T1 - Multi-standard sub-pixel interpolation architecture for video motion estimation

AU - Lu, L.

AU - McCanny, J.V.

AU - Sezer, S.

PY - 2008/1/1

Y1 - 2008/1/1

N2 - A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. ©2008 IEEE.

AB - A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. ©2008 IEEE.

UR - http://www.scopus.com/inward/record.url?partnerID=yv4JPVwI&eid=2-s2.0-67650218483&md5=68219199dde7a420e1781995993cb431

U2 - 10.1109/SOCC.2008.4641517

DO - 10.1109/SOCC.2008.4641517

M3 - Other chapter contribution

SP - 229

EP - 232

BT - 2008 IEEE International SOC Conference, SOCC

T2 - IEEE International SoC Conference

Y2 - 1 September 2008 through 1 September 2008

ER -

Multi-standard sub-pixel interpolation architecture for video motion estimation

Abstract

Conference

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this