New ASIC/FPGA cost estimates for SHA-1 collisions

Muhammad Hassan, Ayesha Khalid, Anupam Chattopadhyay, Christian Rechberger, Tim Guneysu, Christof Paar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

SHA-1 remains, till date, the most widely used hash function, in spite of several successful cryptanalytic attacks against it. These attacks, however, remain impractical due to high computation complexity and associated cost. We endeavor to do cost-time product estimation for an attack by the aid of application-specific hardware acceleration. This work proposes an Application-Specific Instruction-set Processor (ASIP), named Cracken. Cracken is aimed to efficiently realize near collision attack on SHA-1. The estimations of the physical attack complexity is done using 65nm standard CMOS technology and commercial FPGA devices. It is estimated, with post-layout simulations, that Stevens' differential attack with an estimated complexity of 257.5, can be executed in 46 days using 4096 Cracken cores at a cost of Euros 15m. Estimation for real collision with complexity 261 is also done. Our cost-time estimates reveal that an FPGA-based attack is more efficient compared to ASIC. Previously reported SHA-1 attacks based on ASIC and cloud computing platforms are also compiled and benchmarked for reference.

Original languageEnglish
Title of host publicationProceedings - 18th Euromicro Conference on Digital System Design, DSD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages669-676
Number of pages8
ISBN (Electronic)9781467380355
DOIs
Publication statusPublished - 20 Oct 2015
Event18th Euromicro Conference on Digital System Design, DSD 2015 - Madeira, Portugal
Duration: 26 Aug 201528 Aug 2015

Conference

Conference18th Euromicro Conference on Digital System Design, DSD 2015
CountryPortugal
CityMadeira
Period26/08/201528/08/2015

Keywords

  • ASIP
  • Cryptanalysis
  • Near collision
  • SHA-1

ASJC Scopus subject areas

  • Information Systems

Fingerprint Dive into the research topics of 'New ASIC/FPGA cost estimates for SHA-1 collisions'. Together they form a unique fingerprint.

  • Cite this

    Hassan, M., Khalid, A., Chattopadhyay, A., Rechberger, C., Guneysu, T., & Paar, C. (2015). New ASIC/FPGA cost estimates for SHA-1 collisions. In Proceedings - 18th Euromicro Conference on Digital System Design, DSD 2015 (pp. 669-676). [7302342] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DSD.2015.78