On the statistical memory architecture exploration and optimization

Charalampos Antoniadis, Georgios Karakonstantis, Nestor Evmorfopoulos, Andreas Burg, George Stamoulis

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The worsening of process variations and the consequent increased spreads in circuit performance and consumed power hinder the satisfaction of the targeted budgets and lead to yield loss. Corner based design and adoption of design guardbands might limit the yield loss. However, in many cases such methods may not be able to capture the real effects which might be way better than the predicted ones leading to increasingly pessimistic designs. The situation is even more severe in memories which consist of substantially different individual building blocks, further complicating the accurate analysis of the impact of variations at the architecture level leaving many potential issues uncovered and opportunities unexploited. In this paper, we develop a framework for capturing non-trivial statistical interactions among all the components of a memory/cache. The developed tool is able to find the optimum memory/cache configuration under various constraints allowing the designers to make the right choices early in the design cycle and consequently improve performance, energy, and especially yield. Our, results indicate that the consideration of the architectural interactions between the memory components allow to relax the pessimistic access times that are predicted by existing techniques.

Original languageEnglish
Title of host publicationProceedings -Design, Automation and Test in Europe, DATE
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages543-548
Number of pages6
ISBN (Print)9783981537048, ISSN 1530-1591
Publication statusPublished - 22 Apr 2015
Event2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 - Grenoble, France
Duration: 09 Mar 201513 Mar 2015

Conference

Conference2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
CountryFrance
CityGrenoble
Period09/03/201513/03/2015

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint

Dive into the research topics of 'On the statistical memory architecture exploration and optimization'. Together they form a unique fingerprint.

Cite this